Datasheet

SAM3X / SAM3A [DATASHEET]

Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15

456

Figure 25-34. Read Enable Timing Configuration Working with NAND Flash Device

 Ready/Busy Signal Timing configuration working with a NAND Flash device

Use TWB field in SMC_TIMINGS register to configure the maximum elapsed time between the rising edge of wen

signal and the falling edge of rbn signal. Use TRR field in the SMC_TIMINGS register to program the number of

clock cycle between the rising edge of the rbn signal and the falling edge of ren signal.

Figure 25-35. Ready/Busy Timing Configuration

mck

cle

ale

cen

ren

tREN_PULSE tREHtREN_SETUP

tREN_CYCLE

tCLR

tAR

mck

wen

ren

rbn

busy