Datasheet

455
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
25.16.3 NFC Initialization
Prior to any Command and Data Transfer, the SMC User Interface must be configured to meet the device timing
requirements.
 Write enable Configuration
Use NWE_SETUP, NWE_PULSE and NWE_CYCLE to define the write enable waveform according to datasheet
of the device.
Use TADL field in the SMC_TIMINGS register to configure the timing between the last address latch cycle and the
first rising edge of WEN for data input.
Figure 25-32. Write Enable Timing Configuration
Figure 25-33. Write Enable Timing for NAND Flash Device Data Input Mode.
 Read Enable Configuration
Use NRD_SETUP, NRD_PULSE and NRD_CYCLE to define the read enable waveform according to the
datasheet of the device.
Use TAR field in the SMC_TIMINGS register to configure the timings between address latch enable falling edge to
read enable falling edge.
Use TCLR field in the SMC_TIMINGS register to configure the timings between the command latch enable falling
edge to the read enable falling edge.
mck
wen
tWEN_PULSEtWEN_SETUP tWEN_HOLD
tWEN_CYCLES
t ADL
mck
ale
wen