Datasheet

441
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
Figure 25-20. TDF Optimization Disabled (TDF Mode = 0). TDF wait states between 2 read accesses on different chip selects
Figure 25-21. TDF Mode = 0: TDF wait states between a read and a write access on different chip selects
TDF_CYCLES = 6
TDF_CYCLES = 6
TDF_MODE = 0
(optimization disabled)
A[
23:2]
read1 cycle
Chip Select Wait State
MCK
read1 controlling signal
(NRD)
read2 controlling signal
(NRD)
D[15:0]
read1 hold = 1
read 2 cycle
read2 setup = 1
5 TDF WAIT STATES
NBS0, NBS1,
A0, A1
TDF_CYCLES = 4
TDF_CYCLES = 4
TDF_MODE = 0
(optimization disabled)
A
[23:2]
read1 cycle
Chip Select
Wait State
Read to Write
Wait State
MCK
read1 controlling signal
(NRD)
write2 controlling signal
(NWE)
D[15:0]
read1 hold = 1
write2 cycle
write2 setup = 1
2 TDF WAIT STATES
NBS0, NBS1,
A0, A1