Datasheet

425
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
25.9 Connection to External Devices
25.9.1 Data Bus Width
A data bus width of 8 or 16 bits can be selected for each chip select. This option is controlled by the field DBW in
SMC_MODE (Mode Register) for the corresponding chip select.
Figure 25-4 shows how to connect a 512K x 8-bit memory on NCS2. Figure 25-5 shows how to connect a 512K x
16-bit memory on NCS2.
25.9.2 Byte Write or Byte Select Access
Each chip select with a 16-bit data bus can operate with one of two different types of write access: byte write or
byte select access. This is controlled by the BAT field of the SMC_MODE register for the corresponding chip
select.
Figure 25-4. Memory Connection for an 8-bit Data Bus
Figure 25-5. Memory Connection for a 16-bit Data Bus
25.9.2.1 Byte Write Access
Byte write access supports one byte write signal per byte of the data bus and a single read signal.
Note that the SMC does not allow boot in Byte Write Access mode.
 For 16-bit devices: the SMC provides NWR0 and NWR1 write signals for respectively, byte0 (lower byte) and
byte1 (upper byte) of a 16-bit bus. One single read signal (NRD) is provided.
Byte Write Access is used to connect 2 x 8-bit devices as a 16-bit memory.
SMC
A0
NWE
NRD
NCS[2]
A0
Write Enable
Output Enable
Memory Enable
D[7:0] D[7:0]
A[18:2]
A[18:2]
A1
A1
SMC
NBS0
NWE
NRD
NCS[2]
Low Byte Enable
Write Enable
Output Enable
Memory Enable
NBS1 High Byte Enable
D[15:0] D[15:0]
A[19:2]
A[18:1]
A[0]A1