Datasheet

SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
422
25.5 Multiplexed Signals
25.6 Application Example
25.6.1 Implementation Examples
For Hardware implementation examples, please refer to ATSAM3X-EK schematics which show examples of
connection to an LCD module, PSRAM and NAND Flash.
25.6.2 Hardware Interface
Figure 25-2. SMC Connections to Static Memory Devices
Table 25-2. Static Memory Controller (SMC) Multiplexed Signals
Multiplexed Signals Related Function
NWR0 NWE
Byte-write or byte-select access, see Figure 25-4 "Memory Connection for an 8-bit Data
Bus" and Figure 25-5 "Memory Connection for a 16-bit Data Bus"
A0 NBS0 8-bit or 16-bit data bus, see Section 25.9.1 ”Data Bus Width”
A22 NANDCLE NAND Flash Command Latch Enable
A21 NANDALE NAND Flash Address Latch Enable
NWR1 NBS1 Byte-write or byte-select access, see Figure 25-4 and Figure 25-5
A1 –
8-/16-bit data bus, see Section 25.9.1 ”Data Bus Width”
Byte-write or byte-select access, see Figure 25-4 and Figure 25-5
Static Memory
Controller
D0-D15
A2 - A23
A0/NBS0
NWR0/NWE
NWR1/NBS1
A1
128K x 8
SRAM
D0 - D7
A0 - A16
OE
WE
CS
D0 - D7
D8-D15
A2 - A18
128K x 8
SRAM
D0-D7
CS
NWR1/NBS1
NRD
NWR0/NWE
NCS0
NCS1
NCS2
NCS3
NCS4
NCS5
NCS6
NCS7
NRD
OE
WE
A2 - A18
A0 - A16