Datasheet

417
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
24.7.10 SDRAMC Configuration 1 Register
Name: SDRAMC_CR1
Address: 0x400E0228
Access: Read-write
• TMRD: Load Mode Register Command to Active or Refresh Command
Reset Value is 2 cycles.
This field defines the delay between a Load mode register command and an active or refresh command in number of
cycles. Number of cycles is between 0 and 15.
31 30 29 28 27 26 25 24
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23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
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76543210
–––– TMRD