Datasheet

351
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
 ii. If the hardware handshaking interface is activated for the source or destination peripheral, assign
handshaking interface to the source and destination peripheral. This requires programming the
SRC_PER and DST_PER bits, respectively.
16. Source and destination request single and chunk DMAC transactions to transfer the buffer of data (assuming
non-memory peripherals). The DMAC acknowledges on completion of each chunk/single transaction and
carries out the buffer transfer.
a. Set up the transfer type (memory or non-memory peripheral for source and destination) and flow con-
trol peripheral by programming the FC of the DMAC_CTRLBx register.
a.Designate the handshaking interface type (hardware or software) for the source and destination
peripherals. This is not required for memory. This step requires programming the
SRC_H2SEL/DST_H2SEL bits, respe
ct
ively. Writing a ‘1’ activates the hardware handshaking inter-
face to handle source/destination requests for the specific channel. Writing a ‘0’ activates the
software handshaking interface source/destination requests.
b.If the hardware handshaking interface is activated for the s
ource or destination peripheral, assign
handshaking interface to the source and destination peripheral. This requires programming the
SRC_PER and DST_PER bits, respectively.
17. Source and destination request single and chunk DMAC transactions to transfer the buffer of data (assuming
non-memory peripherals). DMAC acknowledges at the completion of every transaction (chunk and single) in
the buffer and carries out the buffer transfer.
 i. Set up the transfer type (memory or non-memory peripheral for source and destination) and flow
control device by programming the FC of the DMAC_CTRLBx register.
 i. Designate the handshaking interface type (hardware or software) for the source and destination
peripherals. This is not required for memory. This step requires programming the
SRC_H2SEL/DST_H2SEL bits, respectively. Writing a ‘1’ activates the hardware handshaking
interface to handle source/destination requests for the specific channel. Writing a ‘0’ activates the
software handshaking interface to handle source/destination requests.
 ii. If the hardware handshaking interface is activated for the source or destination peripheral, assign
the handshaking interface to the source and destination peripheral. This requires programming the
SRC_PER and DST_PER bits, respectively.
18. Source and destination request single and chunk DMAC transactions to transfer the buffer of data (assuming
non-memory peripherals). The DMAC acknowledges at the completion of every transaction (chunk and
single) in the buffer and carries out the buffer transfer.
Multi-buffer DMAC Transfer with Linked List for Source and Contiguous Destination Address (Row 2)
1. Read the Channel Handler Status register to choose a f
r
ee (disabled) channel.
2. Set up the linked list in memory. Write the control information in the LLI.DMAC_CTRLAx and
LLI.DMAC_CTRLBx register location of the buffer descriptor for each LLI in memory for channel x. For
example, in the register, you can program the following:
a. Set up the transfer type (memory or non-memory peripheral for source and destination) and flow con-
trol device by programming the FC of the DMAC_CTRLBx register.
b. Set up the transfer characteristics, such as:
 i. Transfer width for the source in the SRC_WIDTH field.
 ii. Transfer width for the destination in the DST_WIDTH field.
 v. Incrementing/decrementing or fixed address for source in SRC_INCR field.
 vi. Incrementing/decrementing or fixed address for destination DST_INCR field.
3. Write the starting destination address in the DMAC_DADDRx register for channel x.
Note: The values in the LLI.DMAC_DADDRx register location of each Linked List Item (LLI) in memory, although fetched
during an LLI fetch, are not used.
4. Write the channel configuration information into the DMAC_CFGx register for channel x.