Datasheet

301
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
The status of GPNVM bits can be returned by the Enhanced Embedded Flash Controller (EEFC). The sequence
is:
 Start the Get GPNVM bit command by writing the Flash Command Register with GGPB. The FARG field is
meaningless.
 GPNVM bits can be read by the software application in the EEFC_FRR register. The first word read
corresponds to the 32 first GPNVM bits, following reads provide the next 32 GPNVM bits as long as it is
meaningful. Extra reads to the EEFC_FRR register return 0.
For example, if the third bit of the first word read in the EEFC_FRR is set, then the third GPNVM bit is active.
One error can be detected in the EEFC_FSR register after a programming sequence:
 a Command Error: a bad keyword has been written in the EEFC_FCR register.
Note: Access to the Flash in read is permitted when a set, clear or get GPNVM bit command is performed.
18.4.3.6 Calibration Bit
Calibration bits do not interfere with the embedded Flash memory plane.
It is impossible to modify the calibration bits.
The status of calibration bits can be returned by the Enhanced Embedded Flash Controller (EEFC). The sequence
is:
 Issue the Get CALIB Bit command by writing the Flash Command Register with GCALB (see Table 18-2).
The FARG field is meaningless.
 Calibration bits can be read by the software application in the EEFC_FRR register. The first word read
corresponds to the 32 first calibration bits, following reads provide the next 32 calibration bits as long as it is
meaningful. Extra reads to the EEFC_FRR register return 0.
The 4/8/12 MHz Fast RC oscillator is calibrated in production. This calibration can be read through the Get CALIB
Bit command. The table below shows the bit implementation for each frequency:
The RC calibration for 4 MHz is set to 1,000,000.
18.4.3.7 Security Bit Protection
When the security is enabled, access to the Flash, either through the JTAG/SWD interface or through the Fast
Flash Programming Interface, is forbidden. This ensures the confidentiality of the code programmed in the Flash.
The security bit is GPNVM0.
Disabling the security bit can only be achieved by asserting the ERASE pin at 1, and after a full Flash erase is
performed. When the security bit is deactivated, all accesses to the Flash are permitted.
RC Calibration Frequency EEFC_FRR Bits
8 MHz output [28 - 22]
12 MHz output [38 - 32]