Datasheet

SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
292
18. Enhanced Embedded Flash Controller (EEFC)
18.1 Description
The Enhanced Embedded Flash Controller (EEFC) ensures the interface of the Flash block with the 32-bit internal
bus.
Its 128-bit or 64-bit wide memory interface increases performance. It also manages the programming, erasing,
locking and unlocking sequences of the Flash using a full set of commands. One of the commands returns the
embedded Flash descriptor definition that informs the system about the Flash organization, thus making the
software generic.
18.2 Embedded Characteristics
 Interface of the Flash Block with the 32-bit Internal Bus
 Increases Performance in Thumb2
®
Mode with 128-bit or -64 bit Wide Memory Interface up to 23 MHz
 16 Lock Bits, Each Protecting a Lock Region
 3 General-purpose GPNVM Bits
 One-by-one Lock Bit Programming
 Commands Protected by a Keyword
 Erases the Entire Flash
 Possibility of Erasing before Programming
 Locking and Unlocking Operations
 Consecutive Programming and Locking Operations
 Possibility to read the Calibration Bits
18.3 Product Dependencies
18.3.1 Power Management
The Enhanced Embedded Flash Controller (EEFC) is continuously clocked. The Power Management Controller
has no effect on its behavior.
18.3.2 Interrupt Sources
The Enhanced Embedded Flash Controller (EEFC) interrupt line is connected to the Nested Vectored Interrupt
Controller (NVIC). Using the Enhanced Embedded Flash Controller (EEFC) interrupt requires the NVIC to be
programmed first. The EEFC interrupt is generated only on FRDY bit rising.
Table 18-1. Peripheral IDs
Instance ID
EFC0 6
EFC1 7