Datasheet

277
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
16.4.8 Wake Up Sources
The wake up events allow the device to exit backup mode. When a wake up event is detected, the Supply
Controller performs a sequence which automatically reenables the core power supply.
Figure 16-7. Wake Up Source
16.4.8.1 Force Wake Up
The FWUP pin is enabled as a wake up source by writing the FWUPEN bit to 1 in the Supply Controller Wake Up
Mode Register (SUPC_WUMR). Then, the FWUPDBC field in the same register selects the debouncing period,
which can be selected between 3, 32, 512, 4,096 or 32,768 slow clock cycles. This corresponds respectively to
about 100 µs, about 1 ms, about 16 ms, about 128 ms and about 1 second (for a typical slow clock frequency of 32
kHz). Programming FWUPDBC to 0x0 selects an immediate wake up, i.e., the FWUP must be low during a
minimum of one slow clock period to wake up the core power supply.
If the FWUP pin is asserted for a time longer than the debouncing period, a wake up of the core power supply is
started and the FWUP bit in the Supply Controller Status Register (SUPC_SR) is set and remains high until the
register is read.
16.4.8.2 Wake Up Inputs
The wake up inputs, WKUP0 to WKUP15, can be programmed to perform a wake up of the core power supply.
Each input can be enabled by writing to 1 the corresponding bit, WKUPEN0 to WKUPEN 15, in the Wake Up
Inputs Register (SUPC_WUIR). The wake up level can be selected with the corresponding polarity bit, WKUPPL0
to WKUPPL15, also located in SUPC_WUIR.
WKUP15
FWUP
rtt_alarm
rtc_alarm
sm_int
WKUP0
WKUP1
WKUPT1
Core
Supply
Restart
Debouncer
WKUPDBC
WKUPS
Debouncer
FWUPDBC
FWUP
WKUPIS0
WKUPIS1
WKUPIS15
RTTEN
RTCEN
SMEN
WKUPEN15
WKUPEN1
WKUPEN0
FWUPEN
WKUPT15
Falling/Rising
Edge
Detector
WKUPT0
Falling/Rising
Edge
Detector
Falling/Rising
Edge
Detector
Falling
Edge
Detector
SLCK
SLCK