Datasheet
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
274
Waking up the core power supply when a supply monitor detection occurs can be enabled by programming the
SMEN bit to 1 in the Supply Controller Wake Up Mode Register (SUPC_WUMR).
The Supply Controller provides two status bits in the Supply Controller Status Register for the supply monitor
which allows to determine whether the last wake up was due to the supply monitor:
The SMOS bit provides real time information, which is updated at each measurement cycle or updated at
each Slow Clock cycle, if the measurement is continuous.
The SMS bit provides saved information and shows a supply monitor detection has occurred since the last
read of SUPC_SR.
The SMS bit can generate an interrupt if the SMIEN bit is set to 1 in the Supply Controller Supply Monitor Mode
Register (SUPC_SMMR).
Figure 16-4. Supply Monitor Status Bit and Associated Interrupt
Supply Monitor ON
3.3 V
0 V
Threshold
SMS and SUPC interrupt
Read SUPC_SR
Periodic Sampling
Continuous Sampling (SMSMPL = 1)










