Datasheet

SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
218
SW-DP or JTAG-DP mode is selected when JTAGSEL is low. It is not possible to switch directly between SWJ-DP
and JTAG boundary scan operations. A chip reset must be performed after JTAGSEL is changed.
11.5.3.1 SW-DP and JTAG-DP Selection Mechanism
Debug port selection mechanism is done by sending specific SWDIOTMS sequence. The JTAG-DP is selected by
default after reset.
 Switch from JTAG-DP to SW-DP. The sequence is:
 Send more than 50 SWCLKTCK cycles with SWDIOTMS = 1
 Send the 16-bit sequence on SWDIOTMS = 0111100111100111 (0x79E7 MSB first)
 Send more than 50 SWCLKTCK cycles with SWDIOTMS = 1
 Switch from SWD to JTAG. The sequence is:
 Send more than 50 SWCLKTCK cycles with SWDIOTMS = 1
 Send the 16-bit sequence on SWDIOTMS = 0011110011100111 (0x3CE7 MSB first)
 Send more than 50 SWCLKTCK cycles with SWDIOTMS = 1
11.5.4 FPB (Flash Patch Breakpoint)
The FPB:
 Implements hardware breakpoints
 Patches code and data from code space to system space.
The FPB unit contains:
 Two literal comparators for matching against literal loads from Code space, and remapping to a
corresponding area in System space.
 Six instruction comparators for matching against instruction fetches from Code space and remapping to a
corresponding area in System space.
 Alternatively, comparators can also be configured to generate a Breakpoint instruction to the processor core
on a match.
11.5.5 DWT (Data Watchpoint and Trace)
The DWT contains four comparators which can be configured to generate the following:
 PC sampling packets at set intervals
 PC or Data watchpoint packets
 Watchpoint event to halt core
Table 11-2. SWJ-DP Pin List
Pin Name JTAG Port Serial Wire Debug Port
TMS/SWDIO TMS SWDIO
TCK/SWCLK TCK SWCLK
TDI TDI –
TDO/TRACESWO TDO TRACESWO (optional: trace)