Datasheet

SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
2
1. Features
 Core
 ARM Cortex-M3 revision 2.0 running at up to 84 MHz
 Memory Protection Unit (MPU)
 Thumb

-2 instruction set
 24-bit SysTick Counter
 Nested Vector Interrupt Controller
 Memories
 256 to 512 Kbytes embedded Flash, 128-bit wide access, memory accelerator, dual bank
 32 to 100 Kbytes embedded SRAM with dual banks
 16 Kbytes ROM with embedded bootloader routines (UART, USB) and IAP routines
 Static Memory Controller (SMC): SRAM, NOR, NAND support. NFC with 4 Kbyte RAM buffer and ECC
 System
 Embedded voltage regulator for single supply operation
 Power-on-Reset (POR), Brown-out Detector (BOD) and Watchdog for safe reset
 Quartz or ceramic resonator oscillators: 3 to 20 MHz main and optional low power 32.768 kHz for RTC or device
clock
 High precision 8/12 MHz factory trimmed internal RC oscillator with 4 MHz default frequency for fast device
startup
 Slow Clock Internal RC oscillator as permanent clock for device clock in low-power mode
 One PLL for device clock and one dedicated PLL for USB 2.0 High Speed Mini Host/Device
 Temperature Sensor
 Up to 17 peripheral DMA (PDC) channels and 6-channel central DMA plus dedicated DMA for High-Speed USB
Mini Host/Device and Ethernet MAC
 Low-power Modes
 Sleep, Wait and Backup modes, down to 2.5 µA in Backup mode with RTC, RTT, and GPBR
 Peripherals
 USB 2.0 Device/Mini Host: 480 Mbps, 4 Kbyte FIFO, up to 10 bidirectional Endpoints, dedicated DMA
 Up to 4 USARTs (ISO7816, IrDA
®
, Flow Control, SPI, Manchester and LIN support) and one UART
 2 TWI (I2C compatible), up to 6 SPIs, 1 SSC (I2S), 1 HSMCI (SDIO/SD/MMC) with up to 2 slots
 9-channel 32-bit Timer Counter (TC) for capture, compare and PWM mode, Quadrature Decoder Logic and 2-bit
Gray Up/Down Counter for Stepper Motor
 Up to 8-channel 16-bit PWM (PWMC) with Complementary Output, Fault Input, 12-bit Dead Time Generator
Counter for Motor Control
 32-bit low-power Real-time Timer (RTT) and low-power Real-time Clock (RTC) with calendar and alarm features
 256-bit General Purpose Backup Registers (GPBR)
 16-channel 12-bit 1 msps ADC with differential input mode and programmable gain stage
 2-channel 12-bit 1 msps DAC
 Ethernet MAC 10/100 (EMAC) with dedicated DMA
 2 CAN Controllers with 8 Mailboxes
 True Random Number Generator (TRNG)
 Register Write Protection
 I/O
 Up to 103 I/O lines with external interrupt capability (edge or level sensitivity), debouncing, glitch filtering and on-
die Series Resistor Termination
 Up to six 32-bit Parallel Input/Outputs (PIO)