Datasheet

SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
160
10.20.7 Interrupt Priority Registers
The IPR0-IPR7 registers provide a 4-bit priority field for each interrupt (See the “Peripheral Identifiers” section of
the datasheet for more details). These registers are byte-accessible. See the register summary in Table 10-27 on
page 153 for their attributes. Each register holds four priority fields, that map up to four elements in the CMSIS
interrupt priority array
IP[0] to IP[29] , as shown:
10.20.7.1 IPRm
10.20.7.2 IPR4
10.20.7.3 IPR3
10.20.7.4 IPR2
31 302928 27 26 25 24
IP[4m+3]
23 22 21 20 19 18 17 16
IP[4m+2]
15 14 13 12 11 10 9 8
IP[4m+1]
76543 210
IP[4m]
31 302928 27 26 25 24
IP[19]
23 22 21 20 19 18 17 16
IP[18]
15 14 13 12 11 10 9 8
IP[17]
76543 210
IP[16]
31 302928 27 26 25 24
IP[15]
23 22 21 20 19 18 17 16
IP[14]
15 14 13 12 11 10 9 8
IP[13]
76543 210
IP[12]
31 302928 27 26 25 24
IP[11]
23 22 21 20 19 18 17 16
IP[10]
15 14 13 12 11 10 9 8
IP[9]
76543 210
IP[8]