Datasheet

145
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
10.18.5 ISB
Instruction Synchronization Barrier.
10.18.5.1 Syntax
ISB{cond}
where:
cond is an optional condition code, see “Conditional execution” on page 91.
10.18.5.2 Operation
ISB acts as an instruction synchronization barrier. It flushes the pipeline of the processor, so that all instructions
following the ISB are fetched from memory again, after the ISB instruction has been completed.
10.18.5.3 Condition flags
This instruction does not change the flags.
10.18.5.4 Examples
ISB ; Instruction Synchronisation Barrier