Datasheet
1447
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
23-Mar-15
Section 36. “Timer Counter (TC)” (cont’d)
Table 36-2 ”Signal Name Description”: updated descriptions of signals ‘INT’ and ‘SYNC’
Table 36-3 ”TC Pin List”: removed ‘FAULT’ pin
Table 36-4 ”I/O Lines”: added TIOA3/PB0, TIOA4/PB2, TIOA5/PB4, TIOB3/PB1, TIOB4/PB3, and TIOB5/PB5
Section 36.5.3 “Interrupt Sources”: changed title (was “Interrupt”) and added Table 36-5 ”Peripheral IDs”
Section 36.6.2 “32-bit Counter”: revised description
Section 36.6.3 “Clock Selection”: renamed internal clock signals to “MCK/2, MCK/8, MCK/32, MCK/128, SLCK”
Section 36.6.11.1 “WAVSEL = 00”: replaced “0xFFFF” with “2
32
-1” in first paragraph
Figure 36-9 “WAVSEL = 10 without Trigger” and Figure 36-10 “WAVSEL = 10 with Trigger”: replaced “0xFFFF” with
“2
n
-1” (with “n” representing counter size)
Section 36.6.11.3 “WAVSEL = 01”: replaced “0xFFFF” with “2
32
-1” in first paragraph
Figure 36-13 “WAVSEL = 11 without Trigger” and Figure 36-14 “WAVSEL = 11 with Trigger”: replaced “0xFFFF” with
“2
n
-1” (with “n” representing counter size)
Section 36.6.14.1 “Description”: in first paragraph, corrected instance of TIOA1 to TIOB1; corrected link to Figure 36-15
Section 36.6.14.2 “Input Pre-processing”: deleted sentence “Filters can be disabled using the FILTER bit in the
TC_BMR”
Figure 36-16 “Input Stage”: replaced “FILTER” with “MAXFILTER > 0”
Section 36.6.14.3 “Direction Status and Change Detection”: rewrote sixth paragraph for clarity
Section 36.6.14.4 “Position and Rotation Measurement”: rewrote first paragraph for clarity; corrected instance of TIOA1
to TIOB1; at end of second paragraph, defined External Trigger Edge and External Trigger configuration in TC_CMR
Section 36.6.14.5 “Speed Measurement”: replaced “EDGTRG can be set to 0x01” with “ETRGEDG must be set to
0x01”; replaced “The speed can be read on TC_RA0 register in TC_CMR0” with “The speed can be read on field RA in
register TC_RA0”;
Section 36.6.17 “Register Write Protection”: changed title (was “Write Protection System”) and revised content
Table 36-6 ”Register Mapping”: in last row, defined offset range 0xE8–0xFC as reserved
Section 36.7.2 “TC Channel Mode Register: Capture Mode”: in ‘Name’ line, replaced “(WAVE = 0)” with
“(CAPTURE_MODE)”; updated TCCLKS field description
Section 36.7.3 “TC Channel Mode Register: Waveform Mode”: in ‘Name’ line, replaced “(WAVE = 1)” with
“(WAVEFORM_MODE)”; updated TCCLKS field description; added a note for ENETRG description
Section 36.7.9 “TC Status Register”: added “(cleared on read)” to bit descriptions
Section 36.7.14 “TC Block Mode Register”: removed FILTER bit (register bit 19 now reserved); corrected TC2XC2S
field configuration values: value 2 is TIOA0 (was TIOA1); value 3 is TIOA1 (was TIOA2)
Section 36.7.20 “TC Write Protection Mode Register”: updated descriptions of WPEN bit and WPKEY field
Section 39. “USB On-The-Go Interface (UOTGHS)”
Changed index from [x=1..7] to [x=1..6] in “Name” line of following register descriptions:
- Section 39.6.2.17 “Device DMA Channel x Next Descriptor Address Register”
- Section 39.6.2.18 “Device DMA Channel x Address Register”
- Section 39.6.2.19 “Device DMA Channel x Control Register”
- Section 39.6.2.20 “Device DMA Channel x Status Register”
- Section 39.6.3.22 “Host DMA Channel x Next Descriptor Address Register”
- Section 39.6.3.23 “Host DMA Channel x Address Register”
- Section 39.6.3.24 “Host DMA Channel x Control Register”
- Section 39.6.3.25 “Host DMA Channel x Status Register”
Table 50-1. SAM3X/SAM3A Datasheet Rev. 11057C Revision History (Continued)
Issue Date Comments