Datasheet

1443
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
49.1.1.3Flash: Boot Flash Programming Mapping Is Wrong
GPNVM2 enables to select if Flash0 or Flash1 is used for the boot. But when GPNVM2 is set, only the first
64 Kbytes of the Flash 1 are seen in the Boot Memory. The rest of the Boot memory corresponds to Flash 0
content.
Problem Fix/Workaround
No fix required if the code size is less than 64Kbytes. Otherwise the software needs to take into account this
limitation if GPNVM2 is used.
49.1.1.4 Flash: Flash Programming
When writing data into the Flash memory plane (either through the EEFC, using the IAP function or FFPI), the data
may not be correctly written (i.e the data written is not the one expected).
Problem Fix/Workaround
Set the number of Wait States (WS) at 6 (FWS = 6) during the programming.
49.1.2 Backup Mode
49.1.2.1 Backup mode: The PIO States Are Not Kept
When entering in Backup mode, the PIO states are not kept. All the PIOs go into input with pull-up state in Backup
mode.
Problem Fix/Workaround
The issue is of course only present when VDDIO is still supplied in Backup mode. If the VDDIO is required in this
low power mode, either adapt the hardware so that the input with pull-up state is taken into account in the
schematics or use Wait mode instead.
49.1.2.2 Backup Mode: VDDIO/VDDANA
There is an overcurrent consumption in Backup mode on VDDIO and/or VDDANA when VDDIO and/or VDDANA
are supplied.
Problem Fix/Workaround
Two workarounds are possible:
1) Do not supply VDDANA and VDDIO in backup (by using a switch controlled by SHDN pin for example)
2) Use Wait mode instead of Backup Mode.
49.1.2.3 Backup Mode Power-Up Sequence
When waking up from Backup Mode with all VDDIN, VDDIO, VDDANA, VDDUTMI power supplies rising at the
same time, there is an over power consumption on VDDIO.
Problem Fix/ Workaround
The user has to make sure VDDCORE has reached 1.6V before VDDIO starts rising. This might be implemented
with the following control circuitry.
If the internal voltage regulator is used, VDDIN raising 1 ms before VDDIO allows meeting this requirement.
49.1.3 Pulse Width Modulation (PWM)
49.1.3.1 PWM: Write Protection with PIO Lock Feature Not Usable
Write protection mode with PIO lock (WPCMD = 2) can not be used. In this case, the PWM outputs will not be
locked but other PIOs will be locked instead
Problem Fix/Workaround
Use Write protect mode without locking the PIO (WPCMD = 1)