Datasheet

DRAFT
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
1426
45.10.7 USART in SPI Mode Timings
USART in SPI mode timings are given for the following domains:
 1.8V domain: V
DDIO
from 1.62V to 1.95V, maximum external capacitor = 30 pF
 3.3V domain: V
DDIO
from 3.0V to 3.6V, maximum external capacitor = 30 pF
Figure 45-34. USART SPI Master Mode
Figure 45-35. USART SPI Slave mode (Mode 1 or 2)
NSS
SPI
0
MSB
LSB
SPI
1
CPOL=1
CPOL=0
MISO
MOSI
SCK
SPI
5
SPI
2
SPI
3
SPI
4
SPI
4
• MOSI line is driven by the output pin TXD
• MISO line drives the input pin RXD
• SCK line is driven by the output pin SCK
• NSS line is driven by the output pin RTS
SCK
MISO
MOSI
SPI
6
SPI
7
SPI
8
NSS
SPI
12
SPI
13
• MOSI line drives the input pin RXD
• MISO line is driven by the output pin TXD
• SCK line drives the input pin SCK
• NSS line drives the input pin CTS