Datasheet

DRAFT
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
1416
45.10.3.2 SPI Timings
SPI timings are given for the following domains:
 3.3V domain: V
DDIO
from 3.0V to 3.6V, maximum external capacitor = 30 pF
 1.8V domain: V
DDIO
from 1.65V to 1.95V, maximum external capacitor = 30 pF
Table 45-48. SPI Timings
Symbol Parameter Conditions Min Max Unit
SPI
0
MISO Setup time before SPCK rises (master)
3.3V domain 15 ns
1.8V domain 19.5 ns
SPI
1
MISO Hold time after SPCK rises (master)
3.3V domain 0 ns
1.8V domain 0 ns
SPI
2
SPCK rising to MOSI Delay (master)
3.3V domain 3 ns
1.8V domain 3 ns
SPI
3
MISO Setup time before SPCK falls (master)
3.3V domain 16 ns
1.8V domain 20 ns
SPI
4
MISO Hold time after SPCK falls (master)
3.3V domain 0 ns
1.8V domain 0 ns
SPI
5
SPCK falling to MOSI Delay (master)
3.3V domain 3.5 ns
1.8V domain 3.5 ns
SPI
6
SPCK falling to MISO Delay (slave)
3.3V domain 16 ns
1.8V domain 20 ns
SPI
7
MOSI Setup time before SPCK rises (slave)
3.3V domain 0.5 ns
1.8V domain 1.5 ns
SPI
8
MOSI Hold time after SPCK rises (slave)
3.3V domain 0 ns
1.8V domain 0 ns
SPI
9
SPCK rising to MISO Delay (slave)
3.3V domain 16 ns
1.8V domain 30 ns
SPI
10
MOSI Setup time before SPCK falls (slave)
3.3V domain 0 ns
1.8V domain 0.5 ns
SPI
11
MOSI Hold time after SPCK falls (slave)
3.3V domain 1.5 ns
1.8V domain 1.5 ns
SPI
12
NPCS Setup time to SPCK (slave)
3.3V domain 5 ns
1.8V domain 6.2 ns
SPI
13
NPCS Hold time after SPCK (slave)
3.3V domain 0 ns
1.8V domain 0 ns
SPI
14
NPCS Setup time to SPCK (slave)
3.3V domain 5.3 ns
1.8V domain 5.7 ns
SPI
15
NPCS Hold time after SPCK (slave)
3.3V domain 0 ns
1.8V domain 0 ns