Datasheet

DRAFT
1391
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
Notes: 1. Internal voltage regulator not used. VDDIO power consumption only.
2. Flash Wait State (FWS) in EEFC_FMR adjusted versus Core Frequency
Figure 45-11. Active Power Consumption with VDDCORE @ 1.62V Running from Flash Memory or SRAM
Table 45-13. Active Power Consumption with VDDCORE @ 1.62V Running from Flash Memory or SRAM
Core Clock (MHz)
CoreMark
Unit
128-bit Flash Access
(2)
64-bit Flash Access
(2)
SRAM
AMP1 AMP2
(1)
AMP1 AMP2
(1)
AMP1 AMP2
(1)
84 57.66 12.32 51.41 12.32 50.10 13.30
mA
72 51.46 12.32 46.18 12.25 43.60 13.30
60 45.98 12.27 41.97 12.30 36.80 13.30
48 40.90 12.28 36.08 12.34 30.10 13.30
32 31.45 12.32 27.94 12.26 21.30 13.30
24 24.73 12.39 22.32 12.30 16.50 13.30
12 15.32 12.37 14.72 12.30 9.60 13.30
8 12.16 12.28 11.65 12.32 7.50 13.30
4 8.79 12.30 8.01 12.29 5.20 13.30
2 10.57 12.32 9.57 12.28 5.50 13.30
1 6.83 12.30 6.05 12.27 3.70 13.30
0.5 4.59 12.26 4.30 12.31 2.80 13.30
0.25 3.42 12.25 3.12 12.29 2.40 13.30
0.125 2.57 12.30 2.47 12.27 2.20 13.30
0.032 1.74 12.35 1.73 12.34 1.80 13.30
0.00
5.00
10.00
15.00
20.00
25.00
30.00
35.00
0 10203040506070
IDDCORE (mA)
Core Clock (MHz)
128-bit Flash Access
64-bit Flash Access
SRAM