Datasheet

DRAFT
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
1390
Note: 1. Flash Wait State (FWS) in EEFC_FMR adjusted versus Core Frequency
Figure 45-10. Active Power Consumption with VDDCORE @ 1.8V Running from Flash Memory or SRAM
Table 45-12. Active Power Consumption with VDDCORE @ 1.8V Running from Flash Memory or SRAM
Core Clock (MHz)
CoreMark
Unit
128-bit Flash Access
(1)
64-bit Flash Access
(1)
SRAM
AMP1 AMP2 AMP1 AMP2 AMP1 AMP2
84 63.25 76.47 56.08 70.89 64.20 77.50
mA
72 57.63 70.83 51.71 66.86 49.40 62.80
60 53.66 65.48 47.79 62.72 41.80 55.20
48 46.55 57.57 44.70 55.65 34.20 47.60
32 35.44 47.75 31.71 45.21 24.30 38.00
24 29.59 42.44 26.11 39.19 18.90 32.60
12 16.55 32.02 16.26 29.51 11.10 24.90
8 13.40 28.80 12.66 27.51 8.70 22.70
4 10.68 25.46 10.66 24.11 6.10 20.20
2 12.88 23.58 11.53 22.56 6.40 19.50
1 7.87 21.37 7.21 20.13 4.60 17.70
0.5 5.939 18.239 5.321 17.63 3.4 16.7
0.25 3.72 16.27 3.54 15.92 2.90 16.10
0.125 3.12 15.41 2.89 15.24 2.70 15.90
0.032 2.17 14.43 2.17 14.60 2.20 15.50
0.00
5.00
10.00
15.00
20.00
25.00
30.00
35.00
40.00
0 10203040506070
IDDCORE (mA)
Core Clock -MHz)
128-bit Flash Access
64-bit Flash Access
SRAM