Datasheet

1367
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
44.7.3 DACC Channel Enable Register
Name: DACC_CHER
Address: 0x400C8010
Access: Write-only
This register can only be written if the WPEN bit is cleared in DACC Write Protect Mode Register.
CHx: Channel x Enable
0: No effect.
1: Enables the corresponding channel.
31 30 29 28 27 26 25 24
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23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
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76543210
––––– CH1CH0