Datasheet

1199
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
If there is bus activity when Low-power mode is disabled, the CAN controller is synchronized with the bus activity
in the next interframe. The previous message is lost (see Figure 40-9).
Figure 40-9. Disabling Low-power Mode
40.8 Functional Description
40.8.1 CAN Controller Initialization
After power-up reset, the CAN controller is disabled. The CAN controller clock must be activated by the Power
Management Controller (PMC) and the CAN controller interrupt line must be enabled by the interrupt controller
(AIC).
The CAN controller must be initialized with the CAN network parameters. The CAN_BR register defines the
sampling point in the bit time period. CAN_BR must be set before the CAN controller is enabled by setting the
CANEN field in the CAN_MR register.
The CAN controller is enabled by setting the CANEN flag in the CAN_MR register. At this stage, the internal CAN
controller state machine is reset, error counters are reset to 0, error flags are reset to 0.
Once the CAN controller is enabled, bus synchronization is done automatically by scanning eleven recessive bits.
The WAKEUP bit in the CAN_SR register is automatically set to 1 when the CAN controller is synchronized
(WAKEUP and SLEEP are stuck at 0 after a reset).
The CAN controller can start listening to the network in Autobaud Mode. In this case, the error counters are locked
and a mailbox may be configured in Receive Mode. By scanning error flags, the CAN_BR register values
synchronized with the network. Once no error has been detected, the application disables the Autobaud Mode,
clearing the ABM field in the CAN_MR register.
SLEEP
(CAN_SR)
MRDY
(CAN_MSRx)
LPM
(CAN_MR)
CAN BUS
Bus Activity Detected
Message x
Interframe synchronization
WAKEUP
(CAN_SR)
Message lost