Datasheet

1151
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
39.6.3.6 Host Global Interrupt Disable Register
Name: UOTGHS_HSTIDR
Address: 0x400AC414
Access: Write-only
• DMA_x: DMA Channel x Interrupt Disable
Writing a one to this bit will clear the corresponding bit in UOTGHS_HSTIMR.
Writing a zero to this bit has no effect.
This bit always reads as zero.
• PEP_x: Pipe x Interrupt Disable
Writing a one to this bit will clear the corresponding bit in UOTGHS_HSTIMR.
Writing a zero to this bit has no effect.
This bit always reads as zero.
• HWUPIEC: Host Wake-Up Interrupt Disable
Writing a one to this bit will clear HWUPIE bit in UOTGHS_HSTIMR.
Writing a zero to this bit has no effect.
This bit always reads as zero.
• HSOFIEC: Host Start of Frame Interrupt Disable
Writing a one to this bit will clear HSOFIE bit in UOTGHS_HSTIMR.
Writing a zero to this bit has no effect.
This bit always reads as zero.
• RXRSMIEC: Upstream Resume Received Interrupt Disable
Writing a one to this bit will clear RXRSMIE bit in UOTGHS_HSTIMR.
Writing a zero to this bit has no effect.
This bit always reads as zero.
• RSMEDIEC: Downstream Resume Sent Interrupt Disable
Writing a one to this bit will clear RSMEDIE bit in UOTGHS_HSTIMR.
Writing a zero to this bit has no effect.
This bit always reads as zero.
31 30 29 28 27 26 25 24
– DMA_6 DMA_5 DMA_4 DMA_3 DMA_2 DMA_1 –
23 22 21 20 19 18 17 16
––––––PEP_9 PEP_8
15 14 13 12 11 10 9 8
PEP_7 PEP_6 PEP_5 PEP_4 PEP_3 PEP_2 PEP_1 PEP_0
76543210
– HWUPIEC HSOFIEC RXRSMIEC RSMEDIEC RSTIEC DDISCIEC DCONNIEC