Datasheet

SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
1136
39.6.2.17 Device DMA Channel x Next Descriptor Address Register
Name: UOTGHS_DEVDMANXTDSCx [x=1..6]
Address: 0x400AC310 [1], 0x400AC320 [2], 0x400AC330 [3], 0x400AC340 [4], 0x400AC350 [5], 0x400AC360 [6],
0x400AC370 [7]
Access: Read-write
• NXT_DSC_ADD: Next Descriptor Address
This field points to the next channel descriptor to be processed. This channel descriptor must be aligned, so bits 0 to 3 of
the address must be equal to zero.
31 30 29 28 27 26 25 24
NXT_DSC_ADD
23 22 21 20 19 18 17 16
NXT_DSC_ADD
15 14 13 12 11 10 9 8
NXT_DSC_ADD
76543210
NXT_DSC_ADD