Datasheet

SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
1130
39.6.2.15 Device Endpoint x Disable Register
Name: UOTGHS_DEVEPTIDRx [x=0..9]
Address: 0x400AC220
Access: Write-only
• STALLRQC: STALL Request Clear
Writing a one to this bit will clear STALLRQ bit in UOTGHS_DEVEPTIMRx.
Writing a zero to this bit has no effect.
This bit always reads as zero.
• NYETDISC: NYET Token Disable Clear
Writing a one to this bit will clear NYETDIS bit in UOTGHS_DEVEPTIMRx.
Writing a zero to this bit has no effect.
This bit always reads as zero.
• EPDISHDMAC: Endpoint Interrupts Disable HDMA Request Clear
Writing a one to this bit will clear EPDISHDMA bit in UOTGHS_DEVEPTIMRx.
Writing a zero to this bit has no effect.
This bit always reads as zero.
• FIFOCONC: FIFO Control Clear
Writing a one to this bit will clear FIFOCON bit in UOTGHS_DEVEPTIMRx.
Writing a zero to this bit has no effect.
This bit always reads as zero.
• NBUSYBKEC: Number of Busy Banks Interrupt Clear
Writing a one to this bit will clear NBUSYBKE bit in UOTGHS_DEVEPTIMRx.
Writing a zero to this bit has no effect.
This bit always reads as zero.
• ERRORTRANSEC: Transaction Error Interrupt Clear
Writing a one to this bit will clear ERRORTRANSE bit in UOTGHS_DEVEPTIMRx.
Writing a zero to this bit has no effect.
This bit always reads as zero.
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
––––STALLRQC–NYETDISCEPDISHDMAC
15 14 13 12 11 10 9 8
– FIFOCONC – NBUSYBKEC – ERRORTRANSEC DATAXEC MDATEC
76543210
SHORT
PACKETEC
STALLEDEC/
CRCERREC
OVERFEC
NAKINEC/
HBISOFLUSHEC
NAKOUTEC/
HBISOINERREC
RXSTPEC/
UNDERFEC
RXOUTEC TXINEC