Datasheet

113
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
10.13.2 AND, ORR, EOR, BIC, and ORN
Logical AND, OR, Exclusive OR, Bit Clear, and OR NOT.
10.13.2.1 Syntax
op{S}{cond} {Rd,} Rn, Operand2
where:
op is one of:
AND logical AND.
ORR logical OR, or bit set.
EOR logical Exclusive OR.
BIC logical AND NOT, or bit clear.
ORN logical OR NOT.
S is an optional suffix. If S is specified, the condition code flags are updated on the result of the
operation, see “Conditional execution” on page 91.
cond is an optional condition code, see See “Conditional execution” on page 91..
Rd is the destination register.
Rn is the register holding the first operand.
Operand2 is a flexible second operand. See “Flexible second operand” on page 86 for details of the options.
10.13.2.2 Operation
The AND, EOR, and ORR instructions perform bitwise AND, Exclusive OR, and OR operations on the values in Rn
and Operand2.
The BIC instruction performs an AND operation on the bits in Rn with the complements of the corresponding bits in
the value of Operand2.
The ORN instruction performs an OR operation on the bits in Rn with the complements of the corresponding bits in
the value of Operand2.
10.13.2.3 Restrictions
Do not use SP and do not use PC.
10.13.2.4 Condition flags
If S is specified, these instructions:
 update the N and Z flags according to the result
 can update the C flag during the calculation of Operand2, see “Flexible second operand” on page 86
 do not affect the V flag.
10.13.2.5 Examples
AND R9, R2, #0xFF00
ORREQ R2, R0, R5
ANDS R9, R8, #0x19
EORS R7, R11, #0x18181818
BIC R0, R1, #0xab
ORN R7, R11, R14, ROR #4
ORNS R7, R11, R14, ASR #32