Datasheet

1129
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
• NAKOUTE: NAKed OUT Interrupt
This bit is set when UOTGHS_DEVEPTIERx.NAKOUTES bit is written to one. This will enable the NAKed OUT interrupt
(UOTGHS_DEVEPTISRx.NAKOUTI).
This bit is cleared when UOTGHS_DEVEPTIDRx.NAKOUTEC bit is written to one. This will disable the NAKed OUT inter-
rupt (UOTGHS_DEVEPTISRx.NAKOUTI).
• HBISOINERRE: High Bandwidth Isochronous IN Error Interrupt
This bit is set when UOTGHS_DEVEPTIERx.HBISOINERRES bit is written to one. This will enable the HBISOINERRI
interrupt.
This bit is cleared when UOTGHS_DEVEPTIDRx.HBISOINERREC bit disable the HBISOINERRI interrupt.
• RXSTPE: Received SETUP Interrupt
This bit is set when UOTGHS_DEVEPTIERx.RXSTPES bit is written to one. This will enable the Received SETUP inter-
rupt (UOTGHS_DEVEPTISRx.RXSTPI).
This bit is cleared when UOTGHS_DEVEPTIERx.RXSTPEC bit is written to one. This will disable the Received SETUP
interrupt (UOTGHS_DEVEPTISRx.RXSTPI).
• UNDERFE: Underflow Interrupt
This bit is set when UOTGHS_DEVEPTIERx.UNDERFES bit is written to one. This will enable the Underflow interrupt
(UOTGHS_DEVEPTISRx.UNDERFI).
This bit is cleared when UOTGHS_DEVEPTIDRx.UNDERFEC bit is written to one. This will disable the Underflow interrupt
(UOTGHS_DEVEPTISRx.UNDERFI).
• RXOUTE: Received OUT Data Interrupt
This bit is set when UOTGHS_DEVEPTIERx.RXOUTES bit is written to one. This will enable the Received OUT Data inter-
rupt (UOTGHS_DEVEPTISRx.RXOUTI).
This bit is cleared when the UOTGHS_DEVEPTIDRx.RXOUTEC bit is written to one. This will disable the Received OUT
Data interrupt (UOTGHS_DEVEPTISRx.RXOUTI).
• TXINE: Transmitted IN Data Interrupt
This bit is set when UOTGHS_DEVEPTIERx.TXINES bit is written to one. This will enable the Transmitted IN Data inter-
rupt (UOTGHS_DEVEPTISRx.TXINI).
This bit is cleared when UOTGHS_DEVEPTIDRx.TXINEC bit is written to one. This will disable the Transmitted IN Data
interrupt (UOTGHS_DEVEPTISRx.TXINI).