Datasheet

SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
1118
CURRBK: Current Bank
This bit is set for non-control endpoints, to indicate the current bank:
This field may be updated one clock cycle after the RWALL bit changes, so the user should not poll this field as an interrupt
bit.
NBUSYBK: Number of Busy Banks
This field is set to indicate the number of busy banks:
For IN endpoints, it indicates the number of banks filled by the user and ready for IN transfer. When all banks are free, this
triggers a PEP_x interrupt if NBUSYBKE is one.
For OUT endpoints, it indicates the number of banks filled by OUT transactions from the host. When all banks are busy,
this triggers a PEP_x interrupt if NBUSYBKE is one.
When the UOTGHS_DEVEPTIMRx.FIFOCON bit is cleared (by writing a one to the UOTGHS_DEVEPTIMRx.FIFOCONC
bit) to validate a new bank, this field is updated two or three clock cycles later to calculate the address of the next bank.
A PEP_x interrupt is triggered if:
for IN endpoint, UOTGHS_DEVEPTIMRx.NBUSYBKE is one and all the banks are free.
for OUT endpoint, UOTGHS_DEVEPTIMRx.NBUSYBKE is one and all the banks are busy.
ERRORTRANS: High-bandwidth isochronous OUT endpoint transaction error Interrupt
This bit is set when a transaction error occurs during the current micro-frame (the data toggle sequencing does not respect
the USB 2.0 standard). This triggers a PEP_x interrupt if UOTGHS_DEVEPTIMRx.ERRORTRANSE is one.
This bit is set as long as the current bank (CURRBK) belongs to the bad n-transactions (n=1,2 or 3) transferred during the
micro-frame. Shall be cleared by software by clearing (at least once) the UOTGHS_DEVEPTIMRx.FIFOCON bit to switch
to the bank that belongs to the next n-transactions (next micro-frame).
Value Name Description
0 BANK0 Current bank is bank0
1 BANK1 Current bank is bank1
2 BANK2 Current bank is bank2
3 Reserved
Value Name Description
0 0_BUSY 0 busy bank (all banks free)
1 1_BUSY 1 busy bank
2 2_BUSY 2 busy banks
3 3_BUSY 3 busy banks