Datasheet

SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
1108
• EORSTE: End of Reset Interrupt Mask
0: The interrupt is disabled.
1: The interrupt is enabled.
This bit is set when EORSTES bit in UOTGHS_DEVIER is written to one.
This bit is cleared when EORSTEC bit in UOTGHS_DEVIDR is written to one.
• SOFE: Start of Frame Interrupt Mask
0: The interrupt is disabled.
1: The interrupt is enabled.
This bit is set when SOFES bit in UOTGHS_DEVIER is written to one.
This bit is cleared when SOFEC bit in UOTGHS_DEVIDR is written to one.
• MSOFE: Micro Start of Frame Interrupt Mask
0: The interrupt is disabled.
1: The interrupt is enabled.
This bit is set when MSOFES bit in UOTGHS_DEVIER is written to one.
This bit is cleared when MSOFEC bit in UOTGHS_DEVIDR is written to one.
• SUSPE: Suspend Interrupt Mask
0: The interrupt is disabled.
1: The interrupt is enabled.
This bit is set when SUSPES bit in UOTGHS_DEVIER is written to one.
This bit is cleared when SUSPEC bit in UOTGHS_DEVIDR is written to one.