Datasheet

1105
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
39.6.2.4 Device Global Interrupt Set Register
Name: UOTGHS_DEVIFR
Address: 0x400AC00C
Access: Write-only
• DMA_x: DMA Channel x Interrupt Set
Writing a one to this bit will set the corresponding bit in UOTGHS_DEVISR, which may be useful for test or debug
purposes.
Writing a zero to this bit has no effect.
This bit always reads as zero.
• UPRSMS: Upstream Resume Interrupt Set
Writing a one to this bit will set UPRSM bit in UOTGHS_DEVISR, which may be useful for test or debug purposes.
Writing a zero to this bit has no effect.
This bit always reads as zero.
• EORSMS: End of Resume Interrupt Set
Writing a one to this bit will set EORSM bit in UOTGHS_DEVISR, which may be useful for test or debug purposes.
Writing a zero to this bit has no effect.
This bit always reads as zero.
• WAKEUPS: Wake-Up Interrupt Set
Writing a one to this bit will set WAKEUP bit in UOTGHS_DEVISR, which may be useful for test or debug purposes.
Writing a zero to this bit has no effect.
This bit always reads as zero.
• EORSTS: End of Reset Interrupt Set
Writing a one to this bit will set EORST bit in UOTGHS_DEVISR, which may be useful for test or debug purposes.
Writing a zero to this bit has no effect.
This bit always reads as zero.
• SOFS: Start of Frame Interrupt Set
Writing a one to this bit will set SOF bit in UOTGHS_DEVISR, which may be useful for test or debug purposes.
Writing a zero to this bit has no effect.
This bit always reads as zero.
31 30 29 28 27 26 25 24
– DMA_6 DMA_5 DMA_4 DMA_3 DMA_2 DMA_1 –
23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
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76543210
– UPRSMS EORSMS WAKEUPS EORSTS SOFS MSOFS SUSPS