Datasheet

SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
1092
• STOI: Suspend Time-Out Interrupt
This bit is set when a time-out error (more than 200ms) has been detected after a suspend. This triggers a USB interrupt if
UOTGHS_CTRL.STOE is one.
This bit is cleared when the UOTGHS_SCR.STOIC bit is written to one.
This bit shall only be used in host mode.
• HNPERRI: HNP Error Interrupt
This bit is set when an error has been detected during a HNP negotiation. This triggers a USB interrupt if
UOTGHS_CTRL.HNPERRE is one.
This bit is cleared when the UOTGHS_SCR.HNPERRIC bit is written to one.
This bit shall only be used in device mode.
• ROLEEXI: Role Exchange Interrupt
This bit is set when the UOTGHS has successfully switched its mode because of an HNP negotiation (host to device or
device to host). This triggers a USB interrupt if UOTGHS_CTRL.ROLEEXE is one.
This bit is cleared when the UOTGHS_SCR.ROLEEXIC bit is written to one.
• BCERRI: B-Connection Error Interrupt
This bit is set when an error occurs during the B-connection. This triggers a USB interrupt if UOTGHS_CTRL.BCERRE is
one.
This bit is cleared when the UOTGHS_SCR.BCERRIC bit is written to one.
This bit shall only be used in host mode.
• VBERRI: VBus Error Interrupt
This bit is set when a VBus drop has been detected. This triggers a USB interrupt if UOTGHS_CTRL.VBERRE is one.
This bit is cleared when the UOTGHS_SCR.VBERRIC bit is written to one.
This bit shall only be used in host mode.
If a VBus problem occurs, then the VBERRI interrupt is generated even if the UOTGHS does not go to an error state
because UOTGHS_CTRL.VBUSHWC is one.
• SRPI: SRP Interrupt
This bit is set when an SRP has been detected. This triggers a USB interrupt if UOTGHS_CTRL.SRPE is one.
This bit is cleared when the UOTGHS_SCR.SRPIC bit is written to one.
This bit shall only be used in host mode.
• VBUSTI: VBus Transition Interrupt
This bit is set when a transition (high to low, low to high) has been detected on the VBUS pad. This triggers a USB interrupt
if UOTGHS_CTRL.VBUSTE is one.
This bit is cleared when the UOTGHS_SCR.VBUSTIC bit is written to one.
This interrupt is generated even if the clock is frozen by the UOTGHS_CTRL.FRZCLK bit.