Datasheet

1091
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
39.6.1.2 General Status Register
Name: UOTGHS_SR
Address: 0x400AC804
Access: Read-only
• CLKUSABLE: UTMI Clock Usable
This bit is set when the UTMI 30 MHz is usable.
This bit is cleared when the UTMI 30 MHz is not usable.
• SPEED: Speed Status
This field is set according to the controller speed mode. This field shall only be used in device mode.
• VBUS: VBus Level
This bit is set when the VBus line level is high, even if UOTGHS_CTRL.USBE is zero.
This bit is cleared when the VBus line level is low, even if UOTGHS_CTRL.USBE is zero.
This bit can be used in device mode to monitor the USB bus connection state of the application.
• ID: UOTGID Pin State
This bit is cleared when the UOTGID level is low, even if UOTGHS_CTRL.USBE is zero.
This bit is set when the UOTGID level is high, event if UOTGHS_CTRL.USBE is zero.
• VBUSRQ: VBus Request
This bit is set when the UOTGHS_SFR.VBUSRQS bit is written to one.
This bit is cleared when the UOTGHS_SCR.VBUSRQC bit is written to one or when a VBus error occurs and
UOTGHS_CTRL.VBUSHWC is zero.
0: The UOTGVBOF output pin is driven low to disable the VBUS power supply generation.
1: The UOTGVBOF output pin is driven high to enable the VBUS power supply generation.
This bit shall only be used in host mode.
31 30 29 28 27 26 25 24
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23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
– CLKUSABLE SPEED VBUS ID VBUSRQ –
76543210
STOI HNPERRI ROLEEXI BCERRI VBERRI SRPI VBUSTI IDTI
Value Name Description
0 FULL_SPEED Full-Speed mode
2 LOW_SPEED Low-Speed mode
1 HIGH_SPEED High-Speed mode
3 Reserved