Datasheet

1087
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
0x0500 + (n * 0x04) + 0x60 Host Pipe Clear Register UOTGHS_HSTPIPICR Write-only
0x0500 + (n * 0x04) + 0x90 Host Pipe Set Register
UOTGHS_HSTPIPIFR Write-only
0x0500 + (n * 0x04) + 0xC0 Host Pipe Mask Register
UOTGHS_HSTPIPIMR Read-only 0x00000000
0x0500 + (n * 0x04) + 0xF0 Host Pipe Enable Register
UOTGHS_HSTPIPIER Write-only
0x0500+ (n * 0x04) + 0x120 Host Pipe Disable Register
UOTGHS_HSTPIPIDR Write-only
0x0500+ (n * 0x04) + 0x150 Host Pipe IN Request Register
UOTGHS_HSTPIPINRQ Read-write 0x00000000
0x0500 + (n * 0x04) + 0x180 Host Pipe Error Register
UOTGHS_HSTPIPERR Read-write 0x00000000
0x0700 + (n * 0x10) + 0x00
Host DMA Channel Next Descriptor
Address Register
UOTGHS_HSTDMANXTDSC Read-write 0x00000000
0x0700 + (n * 0x10) + 0x04 Host DMA Channel Address Register UOTGHS_HSTDMAADDRESS Read-write 0x00000000
0x0700 + (n * 0x10) + 0x08 Host DMA Channel Control Register
UOTGHS_HSTDMACONTROL Read-write 0x00000000
0x0700 + (n * 0x10) + 0x0C Host DMA Channel Status Register
UOTGHS_HSTDMASTATUS Read-write 0x00000000
0x0800 General Control Register
UOTGHS_CTRL Read-write 0x03004000
0x0804 General Status Register
UOTGHS_SR Read-only 0x00000400
0x0808 General Status Clear Register
UOTGHS_SCR Write-only
0x080C General Status Set Register
UOTGHS_SFR Write-only
0x082C General Finite State Machine Register
UOTGHS_FSM Read-only 0x00000009
Table 39-5. Register Mapping (Continued)
Offset Register
Name Access Reset