Datasheet

SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
1076
39.5.2.19 Interrupts
See the structure of the USB device interrupt system on Figure 39-6 on page 1059.
There are two kinds of device interrupts: processing, i.e. their generation is part of the normal processing, and
exception, i.e. errors (not related to CPU exceptions).
Global interrupts
The processing device global interrupts are:
 The Suspend (UOTGHS_DEVISR.SUSP) interrupt
 The Start of Frame (UOTGHS_DEVISR.SOF) interrupt with no frame number CRC error - the Frame
Number CRC Error (UOTGHS_DEVFNUM.FNCERR) bit is zero.
 The Micro Start of Frame (UOTGHS_DEVISR.MSOF) interrupt with no CRC error.
 The End of Reset (UOTGHS_DEVISR.EORST) interrupt
 The Wake-Up (UOTGHS_DEVISR.WAKEUP) interrupt
 The End of Resume (UOTGHS_DEVISR.EORSM) interrupt
 The Upstream Resume (UOTGHS_DEVISR.UPRSM) interrupt
 The Endpoint x (UOTGHS_DEVISR.PEP_x) interrupt
 The DMA Channel x (UOTGHS_DEVISR.DMA_x) interrupt
The exception device global interrupts are:
 The Start of Frame (UOTGHS_DEVISR.SOF) interrupt with a frame number CRC error
(UOTGHS_DEVFNUM.FNCERR. is one)
 The Micro Start of Frame (UOTGHS_DEVFNUM.FNCERR.MSOF) interrupt with a CRC error
Endpoint Interrupts
The processing device endpoint interrupts are:
 The Transmitted IN Data Interrupt (UOTGHS_DEVEPTISRx.TXINI)
 The Received OUT Data Interrupt (UOTGHS_DEVEPTISRx.RXOUTI)
 The Received SETUP Interrupt (UOTGHS_DEVEPTISRx.RXSTPI)
 The Short Packet (UOTGHS_DEVEPTISRx.SHORTPACKET) interrupt
 The Number of Busy Banks (UOTGHS_DEVEPTISRx.NBUSYBK) interrupt
 The Received OUT isochronous Multiple Data Interrupt (DTSEQ=MDATA &
UOTGHS_DEVEPTISRx.RXOUTI)
 The Received OUT isochronous DataX Interrupt (DTSEQ=DATAX & UOTGHS_DEVEPTISRx.RXOUTI)
The exception device endpoint interrupts are:
 The Underflow Interrupt (UOTGHS_DEVEPTISRx.UNDERFI)
 The NAKed OUT Interrupt (UOTGHS_DEVEPTISRx.NAKOUTI)
 The High-bandwidth isochronous IN error Interrupt (UOTGHS_DEVEPTISRx.HBISOINERRI)
 The NAKed IN Interrupt (UOTGHS_DEVEPTISRx.NAKINI)
 The High-bandwidth isochronous IN Flush error Interrupt (UOTGHS_DEVEPTISRx.HBISOFLUSHI)
 The Overflow Interrupt (UOTGHS_DEVEPTISRx.OVERFI)
 The STALLed Interrupt (UOTGHS_DEVEPTISRx.STALLEDI)
 The CRC Error Interrupt (UOTGHS_DEVEPTISRx.CRCERRI)
 The Transaction error (UOTGHS_DEVEPTISRx.ERRORTRANS) interrupt