Datasheet

1067
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
39.5.2.4 Endpoint Reset
An endpoint can be reset at any time by writing a one to the Endpoint x Reset (UOTGHS_DEVEPT.EPRSTx) bit.
This is recommended before using an endpoint upon hardware reset or when a USB bus reset has been received.
This resets:
 the internal state machine of this endpoint,
 the receive and transmit bank FIFO counters,
 all registers of this endpoint (UOTGHS_DEVEPTCFGx, UOTGHS_DEVEPTISRx, the Endpoint x Control
(UOTGHS_DEVEPTIMRx) register), except its configuration (UOTGHS_DEVEPTCFGx.ALLOC,
UOTGHS_DEVEPTCFGx.EPBK, UOTGHS_DEVEPTCFGx.EPSIZE, UOTGHS_DEVEPTCFGx.EPDIR,
UOTGHS_DEVEPTCFGx.EPTYPE) and the Data Toggle Sequence (UOTGHS_DEVEPTISRx.DTSEQ)
field.
Note: The interrupt sources located in the UOTGHS_DEVEPTISRx register are not cleared when a USB bus reset has been
received.
The endpoint configuration remains active and the endpoint is still enabled.
The endpoint reset may be associated with a clear of the data toggle sequence as an answer to the
CLEAR_FEATURE USB request. This can be achieved by writing a one to the Reset Data Toggle Set bit in the
Endpoint x Control Set register (UOTGHS_DEVEPTIERx.RSTDTS) (this will set the Reset Data Toggle
(UOTGHS_DEVEPTIMRx.RSTDT) bit).
In the end, the user has to write a zero to the UOTGHS_DEVEPT.EPRSTx bit to complete the reset operation and
to start using the FIFO.
39.5.2.5 Endpoint Activation
The endpoint is maintained inactive and reset (see Section 39.5.2.4 for more details) as long as it is disabled
(UOTGHS_DEVEPT.EPENx is written to zero). UOTGHS_DEVEPTISRx.DTSEQ is also reset.
The algorithm represented on Figure 39-13 on page 1067 must be followed in order to activate an endpoint.
Figure 39-13. Endpoint Activation Algorithm
As long as the endpoint is not correctly configured (UOTGHS_HSTPIPISRx.CFGOK is zero), the controller does
not acknowledge the packets sent by the host to this endpoint.
The UOTGHS_HSTPIPISRx.CFGOK bit is set provided that the configured size and number of banks are correct
as compared to the endpoint maximal allowed values (see Table 39-1 on page 1053) and to the maximal FIFO
size (i.e. the DPRAM size).
Endpoint
Activation
UOTGHS_HSTPIPISRx.CFCFGOK== 1?
ERROR
Ye s
Endpoint
Activated
Enable the endpoint.
UOTGHS_DEVEPT.EPENx = 1
Test if the endpoint configuration is correct.
UOTGHS_DEVEPTCFGx
.EPTYPE
.EPDIR
.EPSIZE
.EPBK
.ALLOC
Configure the endpoint:
-
type
-
direction
-
size
-
number of banks
Allocate the configured DPRAM banks.
No