Datasheet

1065
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
In host mode, the UOTGHS_SR.VBUS bit follows an hysteresis based on Session_valid and Va_Vbus_valid:
 It is set when the voltage on the VBUS pad is higher than or equal to 4.4V.
 It is cleared when the voltage on the VBUS pad is lower than 1.4V.
The VBus Transition interrupt (UOTGHS_SR.VBUSTI) bit is set on each transition of the UOTGHS_SR.VBUS bit.
The UOTGHS_SR.VBUS bit is effective whether the UOTGHS is enabled or not.
39.5.1.10 ID Detection
Figure 39-11 on page 1065 shows how the ID transitions are detected.
Figure 39-11. ID Detection Input Block Diagram
The USB mode (device or host) can be either detected from the UOTGID pin or software selected by writing to the
UOTGHS_CTRL.UIMOD bit, according to the UOTGHS_CTRL.UIDE bit. This allows the UOTGID pin to be used
as a general purpose I/O pin even when the USB interface is enabled.
By default, the UOTGID pin is selected (UOTGHS_CTRL.UIDE is written to one) and the UOTGHS is in device
mode (UOTGHS_SR.ID is one), which corresponds to the case where no Mini-A plug is connected, i.e. no plug or
a Mini-B plug is connected and the UOTGID pin is kept high by the internal pull-up resistor from the I/O Controller
(which must be enabled if UOTGID is used).
The ID Transition Interrupt (UOTGHS_SR.IDTI) bit is set on each transition of the UOTGHS_SR.ID bit, i.e. when a
Mini-A plug (host mode) is connected or disconnected. This does not occur when a Mini-B plug (device mode) is
connected or disconnected.
The UOTGHS_SR.ID bit is effective whether the UOTGHS is enabled or not.
39.5.2 USB Device Operation
39.5.2.1 Introduction
In device mode, the UOTGHS supports hi-, full- and low-speed data transfers.
In addition to the default control endpoint, 10 endpoints are provided, which can be configured with an
isochronous, bulk or interrupt type, as described in Table 39-1 on page 1053.
As the device mode starts in Idle state, the pad consumption is reduced to the minimum.
39.5.2.2 Power-On and Reset
Figure 39-12 on page 1066 describes the UOTGHS device mode main states.
R
PU
UIMOD
UOTGHS_CTRL
USB_ID
ID
UOTGHS_SR
VDD
UIDE
UOTGHS_CTRL
1
0
IDTI
UOTGHS_SR
I/O Controller