Datasheet

SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
1058
39.5 Functional Description
39.5.1 USB General Operation
39.5.1.1 Introduction
After a hardware reset, the UOTGHS is disabled. When enabled, the UOTGHS runs either in device mode or in
host mode according to the ID detection.
If the UOTGID pin is not connected to the ground, the UOTGID Pin State bit in the General Status register
(UOTGHS_SR.ID) is set (the internal pull-up resistor of the UOTGID pin must be enabled by the I/O Controller)
and device mode is engaged.
The UOTGHS_SR.ID bit is cleared when a low level has been detected on the UOTGID pin. Host mode is then
engaged.
39.5.1.2 Power-On and Reset
Figure 39-5 on page 1058 describes the UOTGHS main states.
Figure 39-5. General States
After a hardware reset, the UOTGHS is in the Reset state. In this state:
 The macro is disabled. The UOTGHS Enable bit in the General Control register (UOTGHS_CTRL.USBE) is
zero.
 The macro clock is stopped in order to minimize the power consumption. The Freeze USB Clock bit
(UOTGHS_CTRL.FRZCLK) is set.
 The UTMI is in suspend mode.
 The internal states and registers of the device and host modes are reset.
 The DPRAM is not cleared and is accessible.
 The UOTGHS_SR.ID and UOTGHS_SR.VBUS bits reflect the states of the UOTGID and VBUS input pins.
 The OTG Pad Enable (UOTGHS_CTRL.OTGPADE) bit, the VBus Polarity (UOTGHS_CTRL.VBUSPO) bit,
the UOTGHS_CTRL.FRZCLK bit, the UOTGHS_CTRL.USBE bit, the UOTGID Pin Enable
(UOTGHS_CTRL.UIDE) bit, the UOTGHS Mode (UOTGHS_CTRL.UIMOD) bit, and the Low-Speed Mode
Force (UOTGHS_DEVCTRL.LS) bit can be written by software, so that the user can program pads and
speed before enabling the macro, but their value is only taken into account once the macro is enabled and
unfrozen.
After writing a one to UOTGHS_CTRL.USBE, the UOTGHS enters the Device or the Host mode (according to the
ID detection) in idle state.
Device
UOTGHS_CTRL.USBE = 0
UOTGHS_CTRL.USBE = 1
ID = 1
Macro off:
UOTGHS_CTRL.USBE = 0
Clock stopped:
UOTGHS_CTRL.FRZCLK = 1
UOTGHS_CTRL.USBE = 0
UOTGHS_CTRL_USBE = 0
HW
RESET
ID = 0
Reset
Host
UOTGHS_CTRL.USBE = 1
<any
other
state>