Datasheet

1053
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
39. USB On-The-Go Interface (UOTGHS)
39.1 Description
The Universal Serial Bus (USB) MCU device complies with the Universal Serial Bus (USB) 2.0 specification in all
speeds.
Each pipe/endpoint can be configured in one of several USB transfer types. It can be associated with one, two or
three banks of a DPRAM used to store the current data payload. If two or three banks are used, then one DPRAM
bank is read or written by the CPU or the DMA, while the other is read or written by the UOTGHS core. This feature
is mandatory for isochronous pipes/endpoints.
Table 39-1 on page 1053 describes the hardware configuration of the USB MCU device.
Note: Bit fields are presented throughout the document as follows: ‘REGISTER. FIELD’ (e.g. UOTGHS_CTRL.USBE)
39.2 Embedded Characteristics
 Compatible with the USB 2.0 specification
 Supports High (480Mbps), Full (12Mbps) and Low (1.5Mbps) speed communication and On-The-Go
 10 pipes/endpoints
 4096 bytes of Embedded Dual-Port RAM (DPRAM) for Pipes/Endpoints
 Up to 3 memory banks per Pipe/Endpoint (Not for Control Pipe/Endpoint)
 Flexible Pipe/Endpoint configuration and management with dedicated DMA channels
 On-Chip UTMI transceiver including Pull-Ups/Pull-downs
 On-Chip OTG pad including VBUS analog comparator
Table 39-1. Description of USB Pipes/Endpoints
Pipe/Endpoint Mnemonic
Max. Nb.
Banks DMA
High Band
Width
Max. Pipe/
Endpoint Size Type
0 PEP_0 1 N N 64 Control
1 PEP_1 3 Y 1 1024 Isochronous/Bulk/Interrupt/Control
2 PEP_2 3 Y Y 1024 Isochronous/Bulk/Interrupt/Control
3 PEP_3 2 Y Y 1024 Isochronous/Bulk/Interrupt/Control
4 PEP_4 2 Y Y 1024 Isochronous/Bulk/Interrupt/Control
5 PEP_5 2 Y Y 1024 Isochronous/Bulk/Interrupt/Control
6 PEP_6 2 Y Y 1024 Isochronous/Bulk/Interrupt/Control
7 PEP_7 2 N Y 1024 Isochronous/Bulk/Interrupt/Control
8 PEP_8 2 _ Y 1024 Isochronous/Bulk/Interrupt/Control
9 PEP_9 2 _ Y 1024 Isochronous/Bulk/Interrupt/Control