Datasheet

101
SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
10.12.5 LDR, PC-relative
Load register from memory.
10.12.5.1 Syntax
LDR{type}{cond} Rt, label
LDRD{cond} Rt, Rt2, label ; Load two words
where:
type is one of:
B unsigned byte, zero extend to 32 bits.
SB signed byte, sign extend to 32 bits.
H unsigned halfword, zero extend to 32 bits.
SH signed halfword, sign extend to 32 bits.
- omit, for word.
cond is an optional condition code, see “Conditional execution” on page 91.
Rt is the register to load or store.
Rt2 is the second register to load or store.
label is a PC-relative expression. See “PC-relative expressions” on page 90.
10.12.5.2 Operation
LDR loads a register with a value from a PC-relative memory address. The memory address is specified by a label
or by an offset from the PC.
The value to load or store can be a byte, halfword, or word. For load instructions, bytes and halfwords can either
be signed or unsigned. See “Address alignment” on page 90.
label must be within a limited range of the current instruction. Table 10-19 shows the possible offsets between
label and the PC.
You might have to use the .W suffix to get the maximum offset range. See Instruction width selection” on page 92.
10.12.5.3 Restrictions
In these instructions:
Rt can be SP or PC only for word loads
Rt2 must not be SP and must not be PC
Rt must be different from Rt2.
When Rt is PC in a word load instruction:
bit[0] of the loaded value must be 1 for correct execution, and a branch occurs to this halfword-aligned
address
if the instruction is conditional, it must be the last instruction in the IT block.
10.12.5.4 Condition flags
These instructions do not change the flags.
Table 10-19. Offset ranges
Instruction type Offset range
Word, halfword, signed halfword, byte, signed
byte
4095 to 4095
Two words 1020 to 1020