Datasheet

SAM3X / SAM3A [DATASHEET]
Atmel-11057C-ATARM-SAM3X-SAM3A-Datasheet_23-Mar-15
1000
38.6.5.5Changing the Comparison Value and the Comparison Configuration
It is possible to change the comparison values and the comparison configurations while the channel 0 is enabled
(see Section 38.6.3 “PWM Comparison Units”).
To prevent unexpected comparison match, the user must use the “PWM Comparison x Value Update Register”
and the “PWM Comparison x Mode Update Register” (PWM_CMPVUPDx and PWM_CMPMUPDx) to change
respectively the comparison values and the comparison configurations while the channel 0 is still enabled. These
registers hold the new values until the end of the comparison update period (when CUPRCNT is equal to CUPR in
“PWM Comparison x Mode Register” (PWM_CMPMx) and the end of the current PWM period, then update the
values for the next period.
CAUTION:
to be taken into account, the write of the register PWM_CMPVUPDx must be followed by a write of the
register PWM_CMPMUPDx.
Note: If the update registers PWM_CMPVUPDx and PWM_CMPMUPDx are written several times between two updates,
only the last written value are taken into account.
Figure 38-19. Synchronized Update of Comparison Values and Configurations
PWM_CMPVUPDx Value
Comparison Value
for comparison x
User's
Writing
PWM_CMPVx
End of channel0 PWM period and
end of Comparison Update Period
PWM_CMPMUPDx Value
Comparison configuration
for comparison x
PWM_CMPMx
User's
Writing
End of channel0 PWM period and
end of Comparison Update Period and
and PWM_CMPMx written