Datasheet

The 32 general purpose working registers, 64 I/O Registers, and the 1024 bytes of internal data SRAM in
the ATmega8A are all accessible through all these addressing modes. The Register File is described in
General Purpose Register File.
Figure 12-2. Data Memory Map
Register File
R0
R1
R2
R29
R30
R31
I/O Registers
$00
$01
$02
...
$3D
$3E
$3F
...
$0000
$0001
$0002
$001D
$001E
$001F
$0020
$0021
$0022
...
$005D
$005E
$005F
...
Data Address Space
$0060
$0061
$045E
$045F
...
Internal SRAM
Related Links
General Purpose Register File
12.3.1 Data Memory Access Times
This section describes the general access timing concepts for internal memory access. The internal data
SRAM access is performed in two clk
CPU
cycles as described in the figure below.
AVR 8-Bit Microcontroller
AVR Memories
© 2017 Microchip Technology Inc.
Datasheet Complete
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