Datasheet

Figure 12-1. Program Memory Map
$000
$FFF
Application Flash Section
Boot Flash Section
Related Links
BTLDR - Boot Loader Support – Read-While-Write Self-Programming
MEMPROG- Memory Programming
Instruction Execution Timing
12.3 SRAM Data Memory
The figure below shows how the Atmel AVR ATmega8A SRAM Memory is organized.
The lower 1120 Data memory locations address the Register File, the I/O Memory, and the internal data
SRAM. The first 96 locations address the Register File and I/O Memory, and the next 1024 locations
address the internal data SRAM.
The five different addressing modes for the Data memory cover: Direct, Indirect with Displacement,
Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register File, registers R26
to R31 feature the indirect addressing pointer registers.
The direct addressing reaches the entire data space.
The Indirect with Displacement mode reaches 63 address locations from the base address given by the
Y- or Z-register.
When using register indirect addressing modes with automatic pre-decrement and post-increment, the
address registers X, Y and Z are decremented or incremented.
AVR 8-Bit Microcontroller
AVR Memories
© 2017 Microchip Technology Inc.
Datasheet Complete
40001974A-page 36