Datasheet

24.11.6 UBBRH – USART Baud Rate Register High
Name: UBBRH
Offset: 0x20
Reset: 0x00
Property: When addressing I/O Registers as data space the offset address is 0x40
When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When
addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset
addresses.
The UBRRH Register shares the same I/O location as the UCSRC Register. See the Accessing UBRRH/
UCSRC Registers section which describes how to access this register.
Bit 7 6 5 4 3 2 1 0
URSEL UBRR[3:0]
Access
R/W R/W R/W R/W R/W
Reset 0 0 0 0 0
Bit 7 – URSEL Register Select
This bit selects between accessing the UBRRH or the UCSRC Register. It is read as zero when reading
UBRRH. The URSEL must be zero when writing the UBRRH.
Bits 3:0 – UBRR[3:0] USART Baud Rate Register [n = 11:8]
Refer to UBRRL.
24.12 Examples of Baud Rate Setting
For standard crystal and resonator frequencies, the most commonly used baud rates for asynchronous
operation can be generated by using the UBRR settings as listed in the table below.
UBRR values which yield an actual baud rate differing less than 0.5% from the target baud rate, are bold
in the table. Higher error ratings are acceptable, but the Receiver will have less noise resistance when
the error ratings are high, especially for large serial frames (see Asynchronous Operational Range). The
error values are calculated using the following equation:
 % =
BaudRate
Closest Match
BaudRate
 1
× 100 %
Table 24-9. Examples of UBRR Settings for Commonly Used Oscillator Frequencies
Baud
Rate
[bps]
f
osc
= 1.0000MHz f
osc
= 1.8432MHz f
osc
= 2.0000MHz
U2X = 0 U2X = 1 U2X= 0 U2X = 1 U2X = 0 U2X = 1
UBRR Error UBRR Error UBRR Error UBRR Error UBRR Error UBRR Error
2400 25 0.2% 51 0.2% 47 0.0% 95 0.0% 51 0.2% 103 0.2%
4800 12 0.2% 25 0.2% 23 0.0% 47 0.0% 25 0.2% 51 0.2%
9600 6 -7.0% 12 0.2% 11 0.0% 23 0.0% 12 0.2% 25 0.2%
14.4k 3 8.5% 8 -3.5% 7 0.0% 15 0.0% 8 -3.5% 16 2.1%
AVR 8-Bit Microcontroller
USART - Universal Synchronous and Asynchrono...
© 2017 Microchip Technology Inc.
Datasheet Complete
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