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AVR 8-Bit Microcontroller

ATmega8A Data Sheet

Introduction

The ATmega8A is a low-power CMOS 8-bit microcontroller based on the AVR

enhanced RISC

architecture. By executing powerful instructions in a single clock cycle, the ATmega8A achieves

throughputs close to 1 MIPS per MHz. This empowers system designer to optimize the device for power

consumption versus processing speed.

Features

• High-performance, Low-power AVR 8-bit Microcontroller

• Advanced RISC Architecture

– 130 powerful instructions - most single-clock cycle execution

– 32 x 8 general purpose working registers

– Fully static operation

– Up to 16 MIPS throughput at 16 MHz

– On-chip 2-cycle multiplier

• High Endurance Nonvolatile Memory segments

– 8 KB of In-System Self-programmable Flash program memory

– 512B EEPROM

– 1 KB internal SRAM

– Write/erase cycles: 10,000 Flash/100,000 EEPROM

– Data retention: 20 years at 85°C/100 years at 25°C

(1)

– Optional boot code section with independent lock bits

• In-system programming by on-chip boot program

• True read-while-write operation

– Programming lock for software security

• Microchip QTouch

library support

– Capacitive touch buttons, sliders and wheels

– QTouch and QMatrix acquisition

– Up to 64 sense channels

• Peripheral Features

– Two 8-bit timer/counters with separate prescaler, one compare mode

– One 16-bit timer/counter with separate prescaler, compare mode, and capture mode

– Real-time counter with separate oscillator

– Three PWM channels

– 8-channel ADC in TQFP and QFN/MLF package

Datasheet Complete

40001974A-page 1

Summary of content (401 pages)

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AVR 8-Bit Microcontroller ATmega8A Data Sheet Introduction ® The ATmega8A is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega8A achieves throughputs close to 1 MIPS per MHz. This empowers system designer to optimize the device for power consumption versus processing speed.
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AVR 8-Bit Microcontroller – – – – – – • • • • • • Eight channels 10-bit accuracy 6-channel ADC in PDIP package • Six channels 10-bit accuracy Byte-oriented two-wire serial interface Programmable serial USART Master/slave SPI serial interface Programmable watchdog timer with separate on-chip oscillator On-chip analog comparator Special Microcontroller Features – Power-on Reset and programmable Brown-out Detection – Internal calibrated RC oscillator – External and internal interrupt sources – Five sleep m
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Table of Contents Introduction......................................................................................................................1 Features.......................................................................................................................... 1 1. Description.................................................................................................................9 2. Configuration Summary............................................................................
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AVR 8-Bit Microcontroller 13.2. 13.3. 13.4. 13.5. 13.6. 13.7. 13.8. 13.9. Clock Sources............................................................................................................................ 47 Crystal Oscillator........................................................................................................................ 48 Low-frequency Crystal Oscillator................................................................................................49 External RC Oscillator.
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AVR 8-Bit Microcontroller 20. Timer/Counter0 and Timer/Counter1 Prescalers................................................... 111 20.1. 20.2. 20.3. 20.4. 20.5. Overview...................................................................................................................................111 Internal Clock Source................................................................................................................111 Prescaler Reset........................................................
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AVR 8-Bit Microcontroller 24.6. Data Transmission – The USART Transmitter......................................................................... 190 24.7. Data Reception – The USART Receiver.................................................................................. 192 24.8. Asynchronous Data Reception.................................................................................................196 24.9. Multi-Processor Communication Mode...........................................................
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AVR 8-Bit Microcontroller 29.4. 29.5. 29.6. 29.7. 29.8. 29.9. Calibration Byte........................................................................................................................ 291 Page Size................................................................................................................................. 291 Parallel Programming Parameters, Pin Mapping, and Commands..........................................292 Parallel Programming.........................................
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AVR 8-Bit Microcontroller 38. Appendix A: Revision History................................................................................ 396 The Microchip Web Site.............................................................................................. 398 Customer Change Notification Service........................................................................398 Customer Support.......................................................................................................
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AVR 8-Bit Microcontroller Description 1. Description ® The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.
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AVR 8-Bit Microcontroller Configuration Summary 2. Configuration Summary Features ATmega8A Pin count 32 Flash (KB) 8 SRAM (KB) 1 EEPROM (Bytes) 512 General Purpose I/O pins 23 SPI 1 TWI (I2C) 1 USART 1 ADC 10-bit 15 ksps ADC channels 6 (8 in TQFP and QFN/MLF packages) AC propagation delay Typ 400 ns 8-bit Timer/Counters 2 16-bit Timer/Counters 1 PWM channels 3 RC Oscillator +/-3% Operating voltage 2.7 - 5.
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AVR 8-Bit Microcontroller Ordering Information 3. Ordering Information Speed (MHz) 16 Power Supply 2.7 - 5.5V Ordering Code(2) Package(1) ATmega8A-AU ATmega8A-AUR(3) 32A 32A ATmega8A-PU 28P3 ATmega8A-MU 32M1-A ATmega8A-MUR(3) 32M1-A ATmega8A-AN ATmega8A-ANR(3) 32A 32A ATmega8A-MN 32M1-A ATmega8A-MNR(3) 32M1-A ATmega8A-PN 28P3 Operational Range Industrial (-40oC to 85oC) Extended (-40oC to 105oC) Note: 1. This device can also be supplied in wafer form.
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AVR 8-Bit Microcontroller Block Diagram 4. Block Diagram Figure 4-1. Block Diagram SRAM CPU FLASH XTAL1/ TOSC1 XTAL2/ TOSC2 VCC RESET GND Clock generation 8 MHz Crystal Osc 1/2/4/8MHz Calib RC 12MHz External RC Osc 32.
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AVR 8-Bit Microcontroller Pin Configurations 5. Pin Configurations Figure 5-1.
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AVR 8-Bit Microcontroller Pin Configurations PD2 (INT0) PD1 (TXD) PD0 (RXD) PC6 (RESET) PC5 (ADC5/SCL) PC4 (ADC4/SDA) PC3 (ADC3) PC2 (ADC2) 32 31 30 29 28 27 26 25 Figure 5-2. TQFP Top View GND 5 20 AREF VCC 6 19 ADC6 (XTAL1/TOSC1) PB6 7 18 AVCC (XTAL2/TOSC2) PB7 8 17 PB5 (SCK) © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller Pin Configurations PD2 (INT0) PD1 (TXD) PD0 (RXD) PC6 (RESET) PC5 (ADC5/SCL) PC4 (ADC4/SDA) PC3 (ADC3) PC2 (ADC2) 32 31 30 29 28 27 26 25 Figure 5-3.
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AVR 8-Bit Microcontroller Pin Configurations Depending on the clock selection fuse settings, PB6 can be used as input to the inverting Oscillator amplifier and input to the internal clock operating circuit. Depending on the clock selection fuse settings, PB7 can be used as output from the inverting Oscillator amplifier. If the Internal Calibrated RC Oscillator is used as chip clock source, PB7:6 is used as TOSC2:1 input for the Asynchronous Timer/Counter2 if the AS2 bit in ASSR is set.
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AVR 8-Bit Microcontroller Pin Configurations 5.2 Accessing 16-bit Registers The TCNT1, OCR1A/B, and ICR1 are 16-bit registers that can be accessed by the AVR CPU via the 8-bit data bus. A 16-bit register must be byte accessed using two read or write operations. The 16-bit timer has a single 8-bit register for temporary storing of the High byte of the 16-bit access. The same temporary register is shared between all 16-bit registers within the 16-bit timer.
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AVR 8-Bit Microcontroller Pin Configurations Asesmbly Code Example(1) TIM16_ReadTCNT1: ; Save global interrupt flag in r18,SREG ; Disable interrupts cli ; Read TCNT1 into r17:r16 in r16,TCNT1L in r17,TCNT1H ; Restore global interrupt flag out SREG,r18 ret C Code Example(1) unsigned int TIM16_ReadTCNT1( void ) { unsigned char sreg; unsigned int i; /* Save global interrupt flag */ sreg = SREG; /* Disable interrupts */ _CLI(); /* Read TCNT1 into i */ i = TCNT1; /* Restore global interrupt flag */ SREG = sreg;
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AVR 8-Bit Microcontroller Pin Configurations Note: 1. See About Code Examples. The assembly code example requires that the r17:r16 Register pair contains the value to be written to TCNT1. Related Links About Code Examples © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller I/O Multiplexing 6. I/O Multiplexing Each pin is by default controlled by the PORT as a general purpose I/O and alternatively it can be assigned to one of the peripheral functions. The following table describes the peripheral signals multiplexed to the PORT I/O pins. Table 6-1.
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AVR 8-Bit Microcontroller I/O Multiplexing No PAD32 31 PD[1] 32 PD[2] EXTINT ADC/AC OSC T/C # 0 T/C # 1 USART I2C SPI I2C SPI TXD0 INT0 Table 6-2.
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AVR 8-Bit Microcontroller Resources 7. Resources A comprehensive set of development tools, application notes and datasheets are available for download on http://www.atmel.com/avr. © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller Data Retention 8. Data Retention Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM over 20 years at 85°C or 100 years at 25°C. © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller About Code Examples 9. About Code Examples This datasheet contains simple code examples that briefly show how to use various parts of the device. These code examples assume that the part specific header file is included before compilation. Be aware that not all C compiler vendors include bit definitions in the header files and interrupt handling in C is compiler dependent. Please confirm with the C compiler documentation for more details. © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller Capacitive Touch Sensing 10. 10.1 Capacitive Touch Sensing QTouch Library ® ® The QTouch library provides a simple to use solution to realize touch sensitive interfaces on most AVR ™ microcontrollers. The QTouch library includes support for the QTouch and QMatrix acquisition methods. Touch sensing can be added to any application by linking the appropriate QTouch library for the AVR microcontroller.
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AVR 8-Bit Microcontroller AVR CPU Core 11. AVR CPU Core 11.1 Overview This section discusses the AVR core architecture in general. The main function of the CPU core is to ensure correct program execution. The CPU must therefore be able to access memories, perform calculations, control peripherals, and handle interrupts. Figure 11-1.
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AVR 8-Bit Microcontroller AVR CPU Core Six of the 32 registers can be used as three 16-bit indirect address register pointers for Data Space addressing – enabling efficient address calculations. One of the these address pointers can also be used as an address pointer for look up tables in Flash Program memory. These added function registers are the 16-bit X-, Y-, and Z-register, described later in this section.
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AVR 8-Bit Microcontroller AVR CPU Core The Status Register is not automatically stored when entering an interrupt routine and restored when returning from an interrupt. This must be handled by software. © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller AVR CPU Core 11.3.1 SREG – The AVR Status Register Name: Offset: Reset: Property: SREG 0x3F [ID-0000035c] 0x00 When addressing I/O Registers as data space the offset address is 0x5F When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller AVR CPU Core Bit 0 – C Carry Flag The Carry Flag C indicates a Carry in an arithmetic or logic operation. See the “Instruction Set Description” for detailed information. 11.4 General Purpose Register File The Register File is optimized for the AVR Enhanced RISC instruction set. In order to achieve the required performance and flexibility, the following input/output schemes are supported by the Register File: • • • • One 8-bit output operand and one 8-bit result input.
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AVR 8-Bit Microcontroller AVR CPU Core Figure 11-3. The X-, Y- and Z-Registers 15 X-register XH XL 7 0 7 0 R27 (0x1B) 15 Y-register R26 (0x1A) YH YL 7 0 Z-register ZH 7 0 0 7 0 R29 (0x1D) 15 0 R28 (0x1C) ZL 7 0 0 R31 (0x1F) R30 (0x1E) In the different addressing modes these address registers have functions as fixed displacement, automatic increment, and automatic decrement (see the Instruction Set Reference for details). 11.
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AVR 8-Bit Microcontroller AVR CPU Core 11.5.1 SPH and SPL - Stack Pointer High and Stack Pointer Low Register Bit 15 14 13 12 11 10 9 8 0x3E SP15 SP14 SP13 SP12 SP11 SP10 SP9 SP8 SPH 0x3D SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0 SPL 7 6 5 4 3 2 1 0 R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Read/Write Initial Value 0 0 11.
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AVR 8-Bit Microcontroller AVR CPU Core 11.7 Reset and Interrupt Handling The Atmel AVR provides several different interrupt sources. These interrupts and the separate Reset Vector each have a separate Program Vector in the Program memory space. All interrupts are assigned individual enable bits which must be written logic one together with the Global Interrupt Enable bit in the Status Register in order to enable the interrupt.
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AVR 8-Bit Microcontroller AVR CPU Core sbi EECR, EEWE out SREG, r16 ; restore SREG value (I-bit) C Code Example char cSREG; cSREG = SREG; /* store SREG value */ /* disable interrupts during timed sequence */ _CLI(); EECR |= (1<
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AVR 8-Bit Microcontroller AVR Memories 12. AVR Memories 12.1 Overview This section describes the different memories in the ATmega8A. The AVR architecture has two main memory spaces, the Data memory and the Program Memory space. In addition, the ATmega8A features an EEPROM Memory for data storage. All three memory spaces are linear and regular. 12.2 In-System Reprogrammable Flash Program Memory The ATmega8A contains 8K bytes On-chip In-System Reprogrammable Flash memory for program storage.
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AVR 8-Bit Microcontroller AVR Memories Figure 12-1. Program Memory Map $000 Application Flash Section Boot Flash Section $FFF Related Links BTLDR - Boot Loader Support – Read-While-Write Self-Programming MEMPROG- Memory Programming Instruction Execution Timing 12.3 SRAM Data Memory The figure below shows how the Atmel AVR ATmega8A SRAM Memory is organized. The lower 1120 Data memory locations address the Register File, the I/O Memory, and the internal data SRAM.
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AVR 8-Bit Microcontroller AVR Memories The 32 general purpose working registers, 64 I/O Registers, and the 1024 bytes of internal data SRAM in the ATmega8A are all accessible through all these addressing modes. The Register File is described in General Purpose Register File. Figure 12-2. Data Memory Map Register File Data Address Space R0 R1 R2 ... $0000 $0001 $0002 ... R29 R30 R31 I/O Registers $00 $01 $02 ... $001D $001E $001F $3D $3E $3F $005D $005E $005F Internal SRAM $0060 $0061 ...
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AVR 8-Bit Microcontroller AVR Memories Figure 12-3. On-chip Data SRAM Access Cycles T1 T2 T3 clkCPU Address Compute Address Address Valid Write Data WR Read Data RD Memory Vccess Instruction 12.4 Next Instruction EEPROM Data Memory The Atmel AVR ATmega8A contains 512 bytes of data EEPROM memory. It is organized as a separate data space, in which single bytes can be read and written. The EEPROM has an endurance of at least 100,000 write/erase cycles.
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AVR 8-Bit Microcontroller AVR Memories not enter Power-down entirely. It is therefore recommended to verify that the EEPROM write operation is completed before entering Power-down. 12.4.3 Preventing EEPROM Corruption During periods of low VCC, the EEPROM data can be corrupted because the supply voltage is too low for the CPU and the EEPROM to operate properly. These issues are the same as for board level systems using EEPROM, and the same design solutions should be applied.
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AVR 8-Bit Microcontroller AVR Memories 12.6.1 EEARL – The EEPROM Address Register Low Name: Offset: Reset: Property: EEARL 0x1E [ID-000004d0] 0xXX When addressing I/O Registers as data space the offset address is 0x3E When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller AVR Memories 12.6.2 EEARH – The EEPROM Address Register High Name: Offset: Reset: Property: EEARH 0x1F [ID-000004d0] 0x0X When addressing I/O Registers as data space the offset address is 0x3F When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller AVR Memories 12.6.3 EEDR – The EEPROM Data Register Name: Offset: Reset: Property: EEDR 0x1D [ID-000004d0] 0x00 When addressing I/O Registers as data space the offset address is 0x3D When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller AVR Memories 12.6.4 EECR – The EEPROM Control Register Name: Offset: Reset: Property: EECR 0x1C [ID-00000594] 0x00 When addressing I/O Registers as data space the offset address is 0x3C When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller AVR Memories access, the EEAR or EEDR Register will be modified, causing the interrupted EEPROM access to fail. It is recommended to have the Global Interrupt Flag cleared during all the steps to avoid these problems. When the write access time has elapsed, the EEWE bit is cleared by hardware. The user software can poll this bit and wait for a zero before writing the next byte. When EEWE has been set, the CPU is halted for two cycles before the next instruction is executed.
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AVR 8-Bit Microcontroller AVR Memories } EECR |= (1<
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AVR 8-Bit Microcontroller System Clock and Clock Options 13. 13.1 System Clock and Clock Options Clock Systems and their Distribution The figure below presents the principal clock systems in the AVR and their distribution. All of the clocks need not be active at a given time. In order to reduce power consumption, the clocks to modules not being used can be halted by using different sleep modes, as described in Power Management and Sleep Modes. The clock systems are detailed in the following figure.
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AVR 8-Bit Microcontroller System Clock and Clock Options 13.1.3 Flash Clock – clkFLASH The Flash clock controls operation of the Flash interface. The Flash clock is usually active simultaneously with the CPU clock. 13.1.4 Asynchronous Timer Clock – clkASY The Asynchronous Timer clock allows the Asynchronous Timer/Counter to be clocked directly from an external 32kHz clock crystal. The dedicated clock domain allows using this Timer/Counter as a real-time counter even when the device is in sleep mode.
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AVR 8-Bit Microcontroller System Clock and Clock Options Typical Characteristics – TA = -40°C to 85°C 13.3 Crystal Oscillator XTAL1 and XTAL2 are input and output, respectively, of an inverting amplifier which can be configured for use as an On-chip Oscillator, as shown in the figure below. Either a quartz crystal or a ceramic resonator may be used. The CKOPT Fuse selects between two different Oscillator amplifier modes.
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AVR 8-Bit Microcontroller System Clock and Clock Options Table 13-4. Start-up Times for the Crystal Oscillator Clock Selection CKSEL0 SUT1:0 Start-up Time from Power-down and Power-save Additional Delay from Reset (VCC = 5.0V) Recommended Usage 0 00 258 CK(1) 4.1ms Ceramic resonator, fast rising power 0 01 258 CK(1) 65ms Ceramic resonator, slowly rising power 0 10 1K CK(2) – Ceramic resonator, BOD enabled 0 11 1K CK(2) 4.
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AVR 8-Bit Microcontroller System Clock and Clock Options 13.5 External RC Oscillator For timing insensitive applications, the external RC configuration shown in the figure below can be used. The frequency is roughly estimated by the equation f = 1/(3RC). C should be at least 22pF. By programming the CKOPT Fuse, the user can enable an internal 36pF capacitor between XTAL1 and GND, thereby removing the need for an external capacitor. Figure 13-3.
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AVR 8-Bit Microcontroller System Clock and Clock Options 13.6 Calibrated Internal RC Oscillator The calibrated internal RC Oscillator provides a fixed 1.0, 2.0, 4.0, or 8.0MHz clock. All frequencies are nominal values at 5V and 25°C. This clock may be selected as the system clock by programming the CKSEL Fuses as shown in the next table. If selected, it will operate with no external components. The CKOPT Fuse should always be unprogrammed when using this clock option.
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AVR 8-Bit Microcontroller System Clock and Clock Options Figure 13-4. External Clock Drive Configuration EXTERNAL CLOCK SIGNAL When this clock source is selected, start-up times are determined by the SUT Fuses as shown in the following table. Table 13-10. Start-up Times for the External Clock Selection SUT1:0 Start-up Time from Power-down and Power-save Additional Delay from Reset (VCC = 5.0V) Recommended Usage 00 6 CK – BOD enabled 01 6 CK 4.
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AVR 8-Bit Microcontroller System Clock and Clock Options 13.9.1 OSCCAL – The Oscillator Calibration Register Name: Offset: Reset: Property: OSCCAL 0x31 [ID-00000e1c] 0x00 When addressing I/O Registers as data space the offset address is 0x51 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller Power Management and Sleep Modes 14. Power Management and Sleep Modes 14.1 Sleep Modes Sleep modes enable the application to shut down unused modules in the MCU, thereby saving power. The AVR provides various sleep modes allowing the user to tailor the power consumption to the application’s requirements. Figure Clock Distribution in section Clock Systems and their Distribution presents the different clock systems in the ATmega8A, and their distribution.
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AVR 8-Bit Microcontroller Power Management and Sleep Modes 14.2 Idle Mode When the SM2:0 bits are written to 000, the SLEEP instruction makes the MCU enter Idle mode, stopping the CPU but allowing SPI, USART, Analog Comparator, ADC, Two-wire Serial Interface, Timer/Counters, Watchdog, and the interrupt system to continue operating. This sleep mode basically halts clkCPU and clkFLASH, while allowing the other clocks to run.
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AVR 8-Bit Microcontroller Power Management and Sleep Modes • If Timer/Counter2 is clocked asynchronously, i.e. the AS2 bit in ASSR is set, Timer/Counter2 will run during sleep. The device can wake up from either Timer Overflow or Output Compare event from Timer/Counter2 if the corresponding Timer/Counter2 interrupt enable bits are set in TIMSK, and the global interrupt enable bit in SREG is set.
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AVR 8-Bit Microcontroller Power Management and Sleep Modes Brown-out Detection 14.7.4 Internal Voltage Reference The Internal Voltage Reference will be enabled when needed by the Brown-out Detector, the Analog Comparator or the ADC. If these modules are disabled as described in the sections above, the internal voltage reference will be disabled and it will not be consuming power. When turned on again, the user must allow the reference to start up before the output is used.
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AVR 8-Bit Microcontroller Power Management and Sleep Modes 14.8.1 MCUCR – MCU Control Register Name: Offset: Reset: Property: MCUCR 0x35 [ID-00000e1c] 0x00 When addressing I/O Registers as data space the offset address is 0x55 The MCU Control Register contains control bits for power management. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller System Control and Reset 15. System Control and Reset 15.1 Resetting the AVR During Reset, all I/O Registers are set to their initial values, and the program starts execution from the Reset Vector. If the program never enables an interrupt source, the Interrupt Vectors are not used, and regular program code can be placed at these locations. This is also the case if the Reset Vector is in the Application section while the Interrupt Vectors are in the boot section or vice versa.
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AVR 8-Bit Microcontroller System Control and Reset Figure 15-1. Reset Logic DATA BUS PORF BORF EXTRF WDRF MCU Control and Status Register (MCUCSR) Brown-Out Reset Circuit BODEN BODLEVEL Pull-up Resistor SPIKE FILTER Watchdog Oscillator Clock Generator CK Delay Counters TIMEOUT CKSEL[3:0] SUT[1:0] 15.2.1 Power-on Reset A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detection level is defined in the table in System and Reset Characteristics.
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AVR 8-Bit Microcontroller System Control and Reset Figure 15-3. Figure: MCU Start-up, RESET Extended Externally VCC VPOT VRST RESET tTOUT TIME-OUT INTERNAL RESET Related Links System and Reset Characteristics 15.2.2 External Reset An External Reset is generated by a low level on the RESET pin. Reset pulses longer than the minimum pulse width (see table in System and Reset Characteristics) will generate a reset, even if the clock is not running. Shorter pulses are not guaranteed to generate a reset.
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AVR 8-Bit Microcontroller System Control and Reset The BOD circuit will only detect a drop in VCC if the voltage stays below the trigger level for longer than tBOD given in the table in System and Reset Characteristics. Figure 15-5. Brown-out Reset During Operation VCC VBOT- VBOT+ RESET tTOUT TIME-OUT INTERNAL RESET Related Links System and Reset Characteristics 15.2.4 Watchdog Reset When the Watchdog times out, it will generate a short reset pulse of 1 CK cycle duration.
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AVR 8-Bit Microcontroller System Control and Reset 2. 3. When the bandgap reference is connected to the Analog Comparator (by setting the ACBG bit in ACSR). When the ADC is enabled. Thus, when the BOD is not enabled, after setting the ACBG bit or enabling the ADC, the user must always allow the reference to start up before the output from the Analog Comparator or ADC is used.
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AVR 8-Bit Microcontroller System Control and Reset ; reset WDT WDR ; Write logical one to WDCE and WDE in r16, WDTCR ori r16, (1<
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AVR 8-Bit Microcontroller System Control and Reset 15.6.1 MCUCSR – MCU Control and Status Register Name: Offset: Reset: Property: MCUCSR 0x34 [ID-000004d0] 0x00 When addressing I/O Registers as data space the offset address is 0x54 The MCU Control and Status Register provides information on which reset source caused an MCU Reset. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used.
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AVR 8-Bit Microcontroller System Control and Reset 15.6.2 WDTCR – Watchdog Timer Control Register Name: Offset: Reset: Property: WDTCR 0x21 [ID-000004d0] 0x00 When addressing I/O Registers as data space the offset address is 0x41 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller System Control and Reset WDP2 WDP1 WDP0 Number of WDT Oscillator Typical Cycles Time-out at VCC = 3.0V Typical Time-out at VCC = 5.0V 1 1 0 1,024K (1,048,576) 1.1s 1.0s 1 1 1 2,048K (2,097,152) 2.2s 2.1s © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller Interrupts 16. Interrupts This section describes the specifics of the interrupt handling performed by the ATmega8A. For a general explanation of the AVR interrupt handling, refer to Reset and Interrupt Handling. Related Links Reset and Interrupt Handling 16.1 Interrupt Vectors in ATmega8A Table 16-1. Reset and Interrupt Vectors Vector No.
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AVR 8-Bit Microcontroller Interrupts 2. When the IVSEL bit in GICR is set, Interrupt Vectors will be moved to the start of the boot Flash section. The address of each Interrupt Vector will then be the address in this table added to the start address of the boot Flash section. The next table shows reset and Interrupt Vectors placement for the various combinations of BOOTRST and IVSEL settings.
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AVR 8-Bit Microcontroller Interrupts address Labels Code Comments $00b rjmp USART_RXC ; USART RX Complete Handler $00c rjmp USART_UDRE ; UDR Empty Handler $00d rjmp USART_TXC ; USART TX Complete Handler $00e rjmp ADC ; ADC Conversion Complete Handler $00f rjmp EE_RDY ; EEPROM Ready Handler $010 rjmp ANA_COMP ; Analog Comparator Handler $011 rjmp TWSI ; Two-wire Serial Interface Handler $012 rjmp SPM_RDY ; Store Program Memory Ready Handler ldi r16,high(RAMEND) ; Main pr
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AVR 8-Bit Microcontroller Interrupts Adddress Labels Code Comments $001 RESET: ldi r16,high(RAMEND) ; Main program start $002 out SPH,r16 ; Set Stack Pointer to top of RAM $003 ldi r16,low(RAMEND) $004 out SPL,r16 $005 sei $006 XXX $c01 rjmp EXT_INT0 ; IRQ Handler $c02 rjmp EXT_INT1 ; IRQ| Handler :. :. :. $c12 rjmp SPM_RDY ; Enable interrupts ; .
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AVR 8-Bit Microcontroller Interrupts Address Labels Code Comments $c03 ldi r16,low(RAMENSPL,r 16D) $c04 out SPL,r16 $c05 sei $c06 ; Enable interrupts XXX When the BOOTRST Fuse is programmed, the boot section size set to 2K bytes, and the IVSEL bit in the GICR Register is set before any interrupts are enabled, the most typical and general program setup for the Reset and Interrupt Vector Addresses is: Address Labels Code Comments ; .
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AVR 8-Bit Microcontroller Interrupts 16.2.1 GICR – General Interrupt Control Register Name: Offset: Reset: Property: GICR 0x3B [ID-000003cc] 0 When addressing I/O Registers as data space the offset address is 0x5B When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller Interrupts C Code Example void Move_interrupts(void) { /* Enable change of Interrupt Vectors */ GICR = (1<
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AVR 8-Bit Microcontroller External Interrupts 17. External Interrupts The external interrupts are triggered by the INT0, and INT1 pins. Observe that, if enabled, the interrupts will trigger even if the INT0:1 pins are configured as outputs. This feature provides a way of generating a software interrupt. The external interrupts can be triggered by a falling or rising edge or a low level. This is set up as indicated in the specification for the MCU Control Register – MCUCR.
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AVR 8-Bit Microcontroller External Interrupts 17.1.1 MCUCR – MCU Control Register Name: Offset: Reset: Property: MCUCR 0x35 [ID-00000312] 0 When addressing I/O Registers as data space the offset address is 0x55 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller External Interrupts 17.1.2 GICR – General Interrupt Control Register Name: Offset: Reset: Property: GICR 0x3B [ID-00000312] 0 When addressing I/O Registers as data space the offset address is 0x5B When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller External Interrupts 17.1.3 GIFR – General Interrupt Flag Register Name: Offset: Reset: Property: GIFR 0x3A [ID-00000312] 0 When addressing I/O Registers as data space the offset address is 0x5A When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller I/O Ports 18. I/O Ports 18.1 Overview All AVR ports have true Read-Modify-Write functionality when used as general digital I/O ports. This means that the direction of one port pin can be changed without unintentionally changing the direction of any other pin with the SBI and CBI instructions. The same applies when changing drive value (if configured as output) or enabling/disabling of pull-up resistors (if configured as input).
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AVR 8-Bit Microcontroller I/O Ports Related Links Electrical Characteristics – TA = -40°C to 85°C 18.2 Ports as General Digital I/O The ports are bi-directional I/O ports with optional internal pull-ups. The following figure shows a functional description of one I/O-port pin, here generically called Pxn. Figure 18-2.
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AVR 8-Bit Microcontroller I/O Ports When switching between tri-state ({DDxn, PORTxn} = 0b00) and output high ({DDxn, PORTxn} = 0b11), an intermediate state with either pull-up enabled ({DDxn, PORTxn} = 0b01) or output low ({DDxn, PORTxn} = 0b10) must occur. Normally, the pull-up enabled state is fully acceptable, as a high-impedant environment will not notice the difference between a strong high driver and a pull-up.
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AVR 8-Bit Microcontroller I/O Ports Consider the clock period starting shortly after the first falling edge of the system clock. The latch is closed when the clock is low, and goes transparent when the clock is high, as indicated by the shaded region of the “SYNC LATCH” signal. The signal value is latched when the system clock goes low. It is clocked into the PINxn Register at the succeeding positive clock edge.
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AVR 8-Bit Microcontroller I/O Ports /* Insert nop for synchronization*/ _NOP(); /* Read port pins */ i = PINB; :. Note: 1. For the assembly program, two temporary registers are used to minimize the time from pull-ups are set on pins 0, 1, 6, and 7, until the direction bits are correctly set, defining bit 2 and 3 as low and redefining bits 0 and 1 as strong high drivers. 18.2.
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AVR 8-Bit Microcontroller I/O Ports Figure 18-5.
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AVR 8-Bit Microcontroller I/O Ports Table 18-2. Generic Description of Overriding Signals for Alternate Functions Signal Name Full Name Description PUOE Pull-up Override Enable If this signal is set, the pull-up enable is controlled by the PUOV signal. If this signal is cleared, the pull-up is enabled when {DDxn, PORTxn, PUD} = 0b010.
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AVR 8-Bit Microcontroller I/O Ports Port Pin Alternate Functions PB5 SCK (SPI Bus Master clock Input) PB4 MISO (SPI Bus Master Input/Slave Output) PB3 MOSI (SPI Bus Master Output/Slave Input) OC2 (Timer/Counter2 Output Compare Match Output) PB2 SS (SPI Bus Master Slave select) OC1B (Timer/Counter1 Output Compare Match B Output) PB1 OC1A (Timer/Counter1 Output Compare Match A Output) PB0 ICP1 (Timer/Counter1 Input Capture Pin) The alternate pin configuration is as follows: • XTAL2/TOSC2 – Port
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AVR 8-Bit Microcontroller I/O Ports MOSI: SPI Master Data output, Slave Data input for SPI channel. When the SPI is enabled as a Slave, this pin is configured as an input regardless of the setting of DDB3. When the SPI is enabled as a Master, the data direction of this pin is controlled by DDB3. When the pin is forced by the SPI to be an input, the pull-up can still be controlled by the PORTB3 bit.
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AVR 8-Bit Microcontroller I/O Ports 1. 2. INTRC means that the internal RC Oscillator is selected (by the CKSEL Fuse). EXT means that the external RC Oscillator or an external clock is selected (by the CKSEL Fuse). Table 18-5.
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AVR 8-Bit Microcontroller I/O Ports • SCL/ADC5 – Port C, Bit 5 SCL, Two-wire Serial Interface Clock: When the TWEN bit in TWCR is set (one) to enable the Two-wire Serial Interface, pin PC5 is disconnected from the port and becomes the Serial Clock I/O pin for the Twowire Serial Interface. In this mode, there is a spike filter on the pin to suppress spikes shorter than 50 ns on the input signal, and the pin is driven by an open drain driver with slew-rate limitation.
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AVR 8-Bit Microcontroller I/O Ports Table 18-8. Overriding Signals for Alternate Functions in PC3:PC0(1) Signal Name PC3/A11 PC2/A10 PC1/A9 PC0/A8 PUOE 0 0 0 0 PUOV 0 0 0 0 DDOE 0 0 0 0 DDOV 0 0 0 0 PVOE 0 0 0 0 PVOV 0 0 0 0 DIEOE 0 0 0 0 DIEOV 0 0 0 0 DI – – – – AIO ADC3 INPUT ADC2 INPUT ADC1 INPUT ADC0 INPUT Note: 1. When enabled, the Two-wire Serial Interface enables slew-rate controls on the output pins PC4 and PC5. This is not shown in the figure.
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AVR 8-Bit Microcontroller I/O Ports AIN0, Analog Comparator Positive Input. Configure the port pin as input with the internal pull-up switched off to avoid the digital port function from interfering with the function of the Analog Comparator. • T1 – Port D, Bit 5 T1, Timer/Counter1 counter source. • XCK/T0 – Port D, Bit 4 XCK, USART external clock. T0, Timer/Counter0 counter source. • INT1 – Port D, Bit 3 INT1, External Interrupt source 1: The PD3 pin can serve as an external interrupt source.
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AVR 8-Bit Microcontroller I/O Ports Table 18-11. Overriding Signals for Alternate Functions in PD3:PD0 Signal Name PD3/INT1 PD2/INT0 PD1/TXD PD0/RXD PUOE 0 0 TXEN RXEN PUO 0 0 0 PORTD0 • PUD OOE 0 0 TXEN RXEN OO 0 0 1 0 PVOE 0 0 TXEN 0 PVO 0 0 TXD 0 DIEOE INT1 ENABLE INT0 ENABLE 0 0 DIEO 1 1 0 0 INT0 INPUT – RXD – – – DI INT1 INPUT AIO 18.4 – Register Description © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller I/O Ports 18.4.1 SFIOR – Special Function IO Register Name: Offset: Reset: Property: SFIOR 0x30 [ID-00000142] 0 When addressing I/O Registers as data space the offset address is 0x50 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller I/O Ports 18.4.2 PORTB – The Port B Data Register Name: Offset: Reset: Property: PORTB 0x18 0x00 When addressing I/O Registers as data space the offset address is 0x38 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller I/O Ports 18.4.3 DDRB – The Port B Data Direction Register Name: Offset: Reset: Property: DDRB 0x17 0x00 When addressing I/O Registers as data space the offset address is 0x37 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller I/O Ports 18.4.4 PINB – The Port B Input Pins Address Name: Offset: Reset: Property: PINB 0x16 N/A When addressing I/O Registers as data space the offset address is 0x36 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller I/O Ports 18.4.5 PORTC – The Port C Data Register Name: Offset: Reset: Property: PORTC 0x15 0x00 When addressing I/O Registers as data space the offset address is 0x35 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller I/O Ports 18.4.6 DDRC – The Port C Data Direction Register Name: Offset: Reset: Property: DDRC 0x14 0x00 When addressing I/O Registers as data space the offset address is 0x34 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller I/O Ports 18.4.7 PINC – The Port C Input Pins Address Name: Offset: Reset: Property: PINC 0x13 N/A When addressing I/O Registers as data space the offset address is 0x33 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller I/O Ports 18.4.8 PORTD – The Port D Data Register Name: Offset: Reset: Property: PORTD 0x12 0x00 When addressing I/O Registers as data space the offset address is 0x32 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller I/O Ports 18.4.9 DDRD – The Port D Data Direction Register Name: Offset: Reset: Property: DDRD 0x11 0x00 When addressing I/O Registers as data space the offset address is 0x31 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller I/O Ports 18.4.10 PIND – The Port D Input Pins Address Name: Offset: Reset: Property: PIND 0x10 N/A When addressing I/O Registers as data space the offset address is 0x30 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter0 19. 8-bit Timer/Counter0 19.1 Features • Single Channel Counter • Frequency Generator • External Event Counter • 10-bit Clock Prescaler 19.2 Overview Timer/Counter0 is a general purpose, single channel, 8-bit Timer/Counter module. A simplified block diagram of the 8-bit Timer/Counter is shown in the figure below. For the actual placement of I/O pins, refer to Pin Configurations.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter0 19.2.2 Definitions Many register and bit references in this document are written in general form. A lower case “n” replaces the Timer/Counter number, in this case 0. However, when using the register or bit defines in a program, the precise form must be used i.e. TCNT0 for accessing Timer/Counter0 counter value and so on. The definitions in the table below are also used extensively throughout this datasheet. Table 19-1. Definitions 19.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter0 19.5 Operation The counting direction is always up (incrementing), and no counter clear is performed. The counter simply overruns when it passes its maximum 8-bit value (MAX = 0xFF) and then restarts from the bottom (0x00). In normal operation the Timer/Counter Overflow Flag (TOV0) will be set in the same timer clock cycle as the TCNT0 becomes zero. The TOV0 Flag in this case behaves like a ninth bit, except that it is only set, not cleared.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter0 19.7.1 TCCR0 – Timer/Counter Control Register Name: Offset: Reset: Property: TCCR0 0x33 [ID-000004b0] 0 When addressing I/O Registers as data space the offset address is 0x53 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter0 19.7.2 TCNT0 – Timer/Counter Register Name: Offset: Reset: Property: TCNT0 0x32 [ID-00000312] 0 When addressing I/O Registers as data space the offset address is 0x52 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter0 19.7.3 TIMSK – Timer/Counter Interrupt Mask Register Name: Offset: Reset: Property: TIMSK 0x39 [ID-00000312] 0 When addressing I/O Registers as data space the offset address is 0x59 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter0 19.7.4 TIFR – Timer/Counter Interrupt Flag Register Name: Offset: Reset: Property: TIFR 0x38 [ID-000004b0] 0 When addressing I/O Registers as data space the offset address is 0x58 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller Timer/Counter0 and Timer/Counter1 Prescalers 20. Timer/Counter0 and Timer/Counter1 Prescalers 20.1 Overview Timer/Counter1 and Timer/Counter0 share the same prescaler module, but the Timer/Counters can have different prescaler settings. The description below applies to Timer/Counter1 and Timer/Counter0. 20.2 Internal Clock Source The Timer/Counter can be clocked directly by the system clock (by setting the CSn2:0 = 1).
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AVR 8-Bit Microcontroller Timer/Counter0 and Timer/Counter1 Prescalers The synchronization and edge detector logic introduces a delay of 2.5 to 3.5 system clock cycles from an edge has been applied to the T1/T0 pin to the counter is updated. Enabling and disabling of the clock input must be done when T1/T0 has been stable for at least one system clock cycle, otherwise it is a risk that a false Timer/Counter clock pulse is generated.
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AVR 8-Bit Microcontroller Timer/Counter0 and Timer/Counter1 Prescalers 20.5.1 SFIOR – Special Function IO Register Name: Offset: Reset: Property: SFIOR 0x30 [ID-00000142] 0 When addressing I/O Registers as data space the offset address is 0x50 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 21. 16-bit Timer/Counter1 21.1 Features • • • • • • • • • • • 21.2 True 16-bit Design (i.e.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 Figure 21-1. 16-bit Timer/Counter Block Diagram(1) Count Clear Direction TOVn (Int.Req.) Control Logic clkTn Clock Select Edge Detector TOP ( From Prescaler ) Timer/Counter TCNTn Tn BOTTOM = =0 OCnA (Int.Req.) Waveform Generation = OCnA DATA BUS OCRnA OCnB (Int.Req.) Fixed TOP Values Waveform Generation = OCRnB OCnB ( From Analog Comparator Ouput ) ICFn (Int.Req.) Edge Detector ICRn Noise Canceler ICPn TCCRnA TCCRnB Note: 1.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 Compare Match event will also set the Compare Match Flag (OCF1A/B) which can be used to generate an Output Compare interrupt request. The Input Capture Register can capture the Timer/Counter value at a given external (edge triggered) event on either the Input Capture Pin (ICP1) or on the Analog Comparator pins (see Analog Comparator). The Input Capture unit includes a digital filtering unit (Noise Canceler) for reducing the chance of capturing noise spikes.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 21.3 Accessing 16-bit Registers The TCNT1, OCR1A/B, and ICR1 are 16-bit registers that can be accessed by the AVR CPU via the 8-bit data bus. A 16-bit register must be byte accessed using two read or write operations. The 16-bit timer has a single 8-bit register for temporary storing of the High byte of the 16-bit access. The same temporary register is shared between all 16-bit registers within the 16-bit timer.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 Asesmbly Code Example(1) TIM16_ReadTCNT1: ; Save global interrupt flag in r18,SREG ; Disable interrupts cli ; Read TCNT1 into r17:r16 in r16,TCNT1L in r17,TCNT1H ; Restore global interrupt flag out SREG,r18 ret C Code Example(1) unsigned int TIM16_ReadTCNT1( void ) { unsigned char sreg; unsigned int i; /* Save global interrupt flag */ sreg = SREG; /* Disable interrupts */ _CLI(); /* Read TCNT1 into i */ i = TCNT1; /* Restore global interrupt flag */ SREG = sr
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 Note: 1. See About Code Examples. The assembly code example requires that the r17:r16 Register pair contains the value to be written to TCNT1. Related Links About Code Examples 21.3.1 Reusing the Temporary High Byte Register If writing to more than one 16-bit register where the High byte is the same for all registers written, then the High byte only needs to be written once.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 The 16-bit counter is mapped into two 8-bit I/O memory locations: counter high (TCNT1H) containing the upper eight bits of the counter, and Counter Low (TCNT1L) containing the lower eight bits. The TCNT1H Register can only be indirectly accessed by the CPU. When the CPU does an access to the TCNT1H I/O location, the CPU accesses the High byte temporary register (TEMP).
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 Figure 21-3. Input Capture Unit Block Diagram DATA BUS (8-bit) TEMP (8-bit) ICRnH (8-bit) WRITE ICRnL (8-bit) TCNTnH (8-bit) ICRn (16-bit Register) ACO* Analog Comparator TCNTnL (8-bit) TCNTn (16-bit Counter) ACIC* ICNC ICES Noise Canceler Edge Detector ICFn (Int.Req.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 Both the Input Capture Pin (ICP1) and the Analog Comparator Output (ACO) inputs are sampled using the same technique as for the T1 pin (see figure T1 Pin Sampling in section External Clock Source). The edge detector is also identical. However, when the noise canceler is enabled, additional logic is inserted before the edge detector, which increases the delay by four system clock cycles.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 A special feature of Output Compare unit A allows it to define the Timer/Counter TOP value (i.e. counter resolution). In addition to the counter resolution, the TOP value defines the period time for waveforms generated by the waveform generator. The figure below shows a block diagram of the Output Compare unit. The small “n” in the register and bit names indicates the device number (n = 1 for Timer/Counter 1), and the “x” indicates Output Compare unit (A/B).
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 21.7.1 Force Output Compare In non-PWM Waveform Generation modes, the match output of the comparator can be forced by writing a one to the Force Output Compare (FOC1x) bit. Forcing Compare Match will not set the OCF1x Flag or reload/clear the timer, but the OC1x pin will be updated as if a real Compare Match had occurred (the COM1x1:0 bits settings define whether the OC1x pin is set, cleared or toggled). 21.7.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 Figure 21-5. Compare Match Output Unit, Schematic COMnx[1] COMnx[0] FOCnx Waveform Generator D Q 1 OCnx DATA BUS D 0 OCnx Pin Q PORT D Q DDR clk I/O The general I/O port function is overridden by the Output Compare (OC1x) from the waveform generator if either of the COM1x1:0 bits are set. However, the OC1x pin direction (input or output) is still controlled by the Data Direction Register (DDR) for the port pin.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 For detailed timing information refer to Timer/Counter Timing Diagrams. 21.9.1 Normal Mode The simplest mode of operation is the Normal mode (WGM13:0 = 0). In this mode the counting direction is always up (incrementing), and no counter clear is performed. The counter simply overruns when it passes its maximum 16-bit value (MAX = 0xFFFF) and then restarts from the BOTTOM (0x0000).
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 be to use the fast PWM mode using OCR1A for defining TOP (WGM13:0 = 15) since the OCR1A then will be double buffered. For generating a waveform output in CTC mode, the OC1A output can be set to toggle its logical level on each Compare Match by setting the Compare Output mode bits to toggle mode (COM1A1:0 = 1). The OC1A value will not be visible on the port pin unless the data direction for the pin is set to output (DDR_OC1A = 1).
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 Figure 21-7. Fast PWM Mode, Timing Diagram OCRnx/TOP Update and TOVn Interrupt Flag Set and OCnA Interrupt Flag Set or ICFn Interrupt Flag Set (Interrupt on TOP) TCNTn OCnx (COMnx[1:0] = 0x2) OCnx (COMnx[1:0] = 0x3) Period 1 2 3 4 5 6 7 8 The Timer/Counter Overflow Flag (TOV1) is set each time the counter reaches TOP.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 �OCnxPWM = �clk_I/O � ⋅ 1 + TOP N represents the prescale divider (1, 8, 64, 256, or 1024). The extreme values for the OCR1x Register represents special cases when generating a PWM waveform output in the fast PWM mode. If the OCR1x is set equal to BOTTOM (0x0000) the output will be a narrow spike for each TOP+1 timer clock cycle.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 Figure 21-8. Phase Correct PWM Mode, Timing Diagram OCRnx/TOP Update and OCnA Interrupt Flag Set or ICFn Interrupt Flag Set (Interrupt on TOP) TOVn Interrupt Flag Set (Interrupt on Bottom) TCNTn OCnx (COMnx[1:0]] = 0x2) OCnx (COMnx[1:0] = 0x3) Period 1 2 3 4 The Timer/Counter Overflow Flag (TOV1) is set each time the counter reaches BOTTOM.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 The extreme values for the OCR1x Register represent special cases when generating a PWM waveform output in the phase correct PWM mode. If the OCR1x is set equal to BOTTOM the output will be continuously low and if set equal to TOP the output will be continuously high for non-inverted PWM mode. For inverted PWM the output will have the opposite logic values.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 Figure 21-9. Phase and Frequency Correct PWM Mode, Timing Diagram OCnA Interrupt Flag Set or ICFn Interrupt Flag Set (Interrupt on TOP) OCRnx/TOP Updateand TOVn Interrupt Flag Set (Interrupt on Bottom) TCNTn OCnx (COMnx[1:0] = 0x2) OCnx (COMnx[1:0] = 0x3) Period 1 2 3 4 The Timer/Counter Overflow Flag (TOV1) is set at the same timer clock cycle as the OCR1x Registers are updated with the double buffer value (at BOTTOM).
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 continuously low and if set equal to TOP the output will be set to high for non-inverted PWM mode. For inverted PWM the output will have the opposite logic values. If OCR1A is used to define the TOP value (WGM13:0 = 9) and COM1A1:0 = 1, the OC1A output will toggle with a 50% duty cycle. 21.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 the same, but TOP should be replaced by BOTTOM, TOP-1 by BOTTOM+1 and so on. The same renaming applies for modes that set the TOV1 Flag at BOTTOM. Figure 21-12. Timer/Counter Timing Diagram, no Prescaling.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 21.11.1 TCCR1A – Timer/Counter1 Control Register A Name: Offset: Reset: Property: TCCR1A 0x2F 0x00 When addressing I/O Registers as data space the offset address is 0x4F When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 Table 21-3. Compare Output Mode, Fast PWM(1) COM1A1/ COM1B1 COM1A0/ COM1B0 Description 0 0 Normal port operation, OC1A/OC1B disconnected. 0 1 WGM13:0 = 15: Toggle OC1A on Compare Match, OC1B disconnected (normal port operation). For all other WGM1 settings, normal port operation, OC1A/OC1B disconnected.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 The FOC1A/FOC1B bits are always read as zero. Bits 1:0 – WGM1n[1:0] Waveform Generation Mode [n = 1:0] Combined with the WGM13:2 bits found in the TCCR1B Register, these bits control the counting sequence of the counter, the source for maximum (TOP) counter value, and what type of waveform generation to be used, refer to the table below.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 21.11.2 TCCR1B – Timer/Counter1 Control Register B Name: Offset: Reset: Property: TCCR1B 0x2E 0x00 When addressing I/O Registers as data space the offset address is 0x4E When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 Table 21-6. Clock Select Bit Description CA12 CA11 CS10 Description 0 0 0 No clock source (Timer/Counter stopped). 0 0 1 clkI/O/1 (No prescaling) 0 1 0 clkI/O/8 (From prescaler) 0 1 1 clkI/O/64 (From prescaler) 1 0 0 clkI/O/256 (From prescaler) 1 0 1 clkI/O/1024 (From prescaler) 1 1 0 External clock source on T1 pin. Clock on falling edge. 1 1 1 External clock source on T1 pin. Clock on rising edge.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 21.11.3 TCNT1L – Timer/Counter1 Low byte Name: Offset: Reset: Property: TCNT1L 0x2C 0x00 When addressing I/O Registers as data space the offset address is 0x4C When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 21.11.4 TCNT1H – Timer/Counter1 High byte Name: Offset: Reset: Property: Bit 7 TCNT1H 0x2D 0x00 When addressing I/O Registers as data space the offset address is 0x4D 6 5 4 3 2 1 0 TCNT1H[7:0] Access Reset R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 0 0 0 0 Bits 7:0 – TCNT1H[7:0] Timer/Counter 1 High byte Refer to TCNT1L. © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 21.11.5 OCR1AL – Output Compare Register 1 A Low byte Name: Offset: Reset: Property: OCR1AL 0x2A 0x00 When addressing I/O Registers as data space the offset address is 0x4A When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 21.11.6 OCR1AH – Output Compare Register 1 A High byte Name: Offset: Reset: Property: Bit 7 OCR1AH 0x2B 0x00 When addressing I/O Registers as data space the offset address is 0x4B 6 5 4 3 2 1 0 OCR1AH[7:0] Access Reset R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 0 0 0 0 Bits 7:0 – OCR1AH[7:0] Output Compare 1 A High byte Refer to OCR1AL. © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 21.11.7 OCR1BL – Output Compare Register 1 B Low byte Name: Offset: Reset: Property: Bit 7 OCR1BL 0x28 0x00 When addressing I/O Registers as data space the offset address is 0x48 6 5 4 3 2 1 0 OCR1BL[7:0] Access Reset R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 0 0 0 0 Bits 7:0 – OCR1BL[7:0] Output Compare 1 B Low byte Refer to OCR1AL. © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 21.11.8 OCR1BH – Output Compare Register 1 B High byte Name: Offset: Reset: Property: Bit 7 OCR1BH 0x29 0x00 When addressing I/O Registers as data space the offset address is 0x49 6 5 4 3 2 1 0 OCR1BH[7:0] Access Reset R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 0 0 0 0 Bits 7:0 – OCR1BH[7:0] Output Compare 1 B High byte Refer to OCR1AL. © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 21.11.9 ICR1L – Input Capture Register 1 Low byte Name: Offset: Reset: Property: ICR1L 0x26 0x00 When addressing I/O Registers as data space the offset address is 0x46 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 21.11.10 ICR1H – Input Capture Register 1 High byte Name: Offset: Reset: Property: Bit 7 ICR1H 0x27 0x00 When addressing I/O Registers as data space the offset address is 0x47 6 5 4 3 2 1 0 ICR1H[7:0] Access Reset R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 0 0 0 0 Bits 7:0 – ICR1H[7:0] Input Capture 1 High byte Refer to ICR1L. © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 21.11.11 TIMSK – Timer/Counter Interrupt Mask Register Name: Offset: Reset: Property: TIMSK 0x39 0x00 When addressing I/O Registers as data space the offset address is 0x59 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses. Note: 1.
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AVR 8-Bit Microcontroller 16-bit Timer/Counter1 21.11.12 TIFR – Timer/Counter Interrupt Flag Register Name: Offset: Reset: Property: TIFR 0x38 0x00 When addressing I/O Registers as data space the offset address is 0x58 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses. Note: 1.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter2 with PWM and Asynchronous Ope... 22. 8-bit Timer/Counter2 with PWM and Asynchronous Operation 22.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter2 with PWM and Asynchronous Ope... Pin Configurations 22.2.1 Registers The Timer/Counter (TCNT2) and Output Compare Register (OCR2) are 8-bit registers. Interrupt request (shorten as Int.Req.) signals are all visible in the Timer Interrupt Flag Register (TIFR). All interrupts are individually masked with the Timer Interrupt Mask Register (TIMSK). TIFR and TIMSK are not shown in the figure since these registers are shared by other timer units.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter2 with PWM and Asynchronous Ope... Figure 22-2. Counter Unit Block Diagram TOVn (Int. Req.) DATA BUS TOSC1 count TCNTn clear Control Logic clk Tn Prescaler T/C Oscillator direction BOTTOM TOSC2 TOP clkI/O Signal description (internal signals): count Increment or decrement TCNT2 by 1. direction Selects between increment and decrement. clear Clear TCNT2 (set all bits to zero). clkT2 Timer/Counter clock.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter2 with PWM and Asynchronous Ope... Figure 22-3. Output Compare Unit, Block Diagram DATA BUS OCRn TCNTn = (8-bit Comparator ) OCFn (Int. Req.) TOP BOTTOM Waveform Generator OCxy FOCn WGMn1:0 COMn1:0 The OCR2 Register is double buffered when using any of the Pulse Width Modulation (PWM) modes. For the normal and Clear Timer on Compare (CTC) modes of operation, the double buffering is disabled.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter2 with PWM and Asynchronous Ope... Compare Match will be missed, resulting in incorrect waveform generation. Similarly, do not write the TCNT2 value equal to BOTTOM when the counter is downcounting. The setup of the OC2 should be performed before setting the Data Direction Register for the port pin to output. The easiest way of setting the OC2 value is to use the Force Output Compare (FOC2) strobe bit in Normal mode.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter2 with PWM and Asynchronous Ope... The design of the Output Compare Pin logic allows initialization of the OC2 state before the output is enabled. Note that some COM21:0 bit settings are reserved for certain modes of operation. See Register Description. 22.6.1 Compare Output Mode and Waveform Generation The Waveform Generator uses the COM21:0 bits differently in normal, CTC, and PWM modes.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter2 with PWM and Asynchronous Ope... Figure 22-5. CTC Mode, Timing Diagram OCn Interrupt Flag Set TCNTn OCn (Toggle) Period (COMn1:0 = 1) 1 2 3 4 An interrupt can be generated each time the counter value reaches the TOP value by using the OCF2 Flag. If the interrupt is enabled, the interrupt handler routine can be used for updating the TOP value.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter2 with PWM and Asynchronous Ope... small horizontal line marks on the TCNT2 slopes represent compare matches between OCR2 and TCNT2. Figure 22-6. Fast PWM Mode, Timing Diagram OCRn Interrupt Flag Set OCRn Update and TOVn Interrupt Flag Set TCNTn OCn (COMn1:0 = 2) OCn (COMn1:0 = 3) Period 1 2 3 4 5 6 7 The Timer/Counter Overflow Flag (TOV2) is set each time the counter reaches MAX.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter2 with PWM and Asynchronous Ope... repeatedly from BOTTOM to MAX and then from MAX to BOTTOM. In non-inverting Compare Output mode, the Output Compare (OC2) is cleared on the Compare Match between TCNT2 and OCR2 while upcounting, and set on the Compare Match while downcounting. In inverting Output Compare mode, the operation is inverted. The dual-slope operation has lower maximum operation frequency than single slope operation.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter2 with PWM and Asynchronous Ope... The extreme values for the OCR2 Register represent special cases when generating a PWM waveform output in the phase correct PWM mode. If the OCR2 is set equal to BOTTOM, the output will be continuously low and if set equal to MAX the output will be continuously high for non-inverted PWM mode. For inverted PWM the output will have the opposite logic values.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter2 with PWM and Asynchronous Ope... Figure 22-9. Timer/Counter Timing Diagram, with Prescaler (fclk_I/O/8) clkI/O clkTn (clkI/O /8) TCNTn MAX - 1 MAX BOTTOM BOTTOM + 1 TOVn The next figure shows the setting of OCF2 in all modes except CTC mode. Figure 22-10.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter2 with PWM and Asynchronous Ope... Figure 22-11. Timer/Counter Timing Diagram, Clear Timer on Compare Match Mode, with Prescaler (fclk_I/O/8) clkI/O clkTn (clkI/O /8) TCNTn (CTC) OCRn TOP - 1 TOP BOTTOM BOTTOM + 1 TOP OCFn 22.9 Asynchronous Operation of the Timer/Counter 22.9.1 Asynchronous Operation of Timer/Counter2 When Timer/Counter2 operates asynchronously, some considerations must be taken.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter2 with PWM and Asynchronous Ope... • and the MCU enters sleep mode before the OCR2UB bit returns to zero, the device will never receive a Compare Match interrupt, and the MCU will not wake up. If Timer/Counter2 is used to wake the device up from Power-save or Extended Standby mode, precautions must be taken if the user wants to re-enter one of these modes: The interrupt logic needs one TOSC1 cycle to be reset.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter2 with PWM and Asynchronous Ope... 22.10 Timer/Counter Prescaler Figure 22-12. Prescaler for Timer/Counter2 PSR2 clkT2S/1024 clkT2S/256 clkT2S/128 clkT2S/64 AS2 10-BIT T/C PRESCALER Clear clkT2S/32 TOSC1 clkT2S clkT2S/8 clkI/O 0 CS20 CS21 CS22 TIMER/COUNTER2 CLOCK SOURCE clkT2 The clock source for Timer/Counter2 is named clkT2S. clkT2S is by default connected to the main system clock clkI/O.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter2 with PWM and Asynchronous Ope... 22.11.1 TCCR2 – Timer/Counter Control Register Name: Offset: Reset: Property: TCCR2 0x25 0x00 When addressing I/O Registers as data space the offset address is 0x45 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter2 with PWM and Asynchronous Ope... Bits 5:4 – COM2n[1:0] Compare Match Output Mode [n = 1:0] These bits control the Output Compare Pin (OC2) behavior. If one or both of the COM21:0 bits are set, the OC2 output overrides the normal port functionality of the I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit corresponding to OC2 pin must be set in order to enable the output driver.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter2 with PWM and Asynchronous Ope... Note: 1. A special case occurs when OCR2 equals TOP and COM21 is set. In this case, the Compare Match is ignored, but the set or clear is done at TOP. See Phase Correct PWM Mode for more details. Bit 3 – WGM21 Waveform Generation Mode [n=0:1] Refer to WGM20. Bits 2:0 – CS2n[2:0] Clock Select [n = 2:0] The three Clock Select bits select the clock source to be used by the Timer/Counter. Table 22-6.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter2 with PWM and Asynchronous Ope... 22.11.2 TCNT2 – Timer/Counter Register Name: Offset: Reset: Property: TCNT2 0x24 [ID-00000312] 0x00 When addressing I/O Registers as data space the offset address is 0x44 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter2 with PWM and Asynchronous Ope... 22.11.3 OCR2 – Output Compare Register Name: Offset: Reset: Property: OCR2 0x23 [ID-00000312] 0x00 When addressing I/O Registers as data space the offset address is 0x43 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter2 with PWM and Asynchronous Ope... 22.11.4 ASSR – Asynchronous Status Register Name: Offset: Reset: Property: ASSR 0x22 0x00 When addressing I/O Registers as data space the offset address is 0x42 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter2 with PWM and Asynchronous Ope... 22.11.5 TIMSK – Timer/Counter Interrupt Mask Register Name: Offset: Reset: Property: TIMSK 0x39 [ID-00000d14] 0x00 When addressing I/O Registers as data space the offset address is 0x59 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter2 with PWM and Asynchronous Ope... 22.11.6 TIFR – Timer/Counter Interrupt Flag Register Name: Offset: Reset: Property: TIFR 0x38 [ID-00000d14] 0x00 When addressing I/O Registers as data space the offset address is 0x58 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller 8-bit Timer/Counter2 with PWM and Asynchronous Ope... 22.11.7 SFIOR – Special Function IO Register Name: Offset: Reset: Property: SFIOR 0x30 [ID-00000d14] 0 When addressing I/O Registers as data space the offset address is 0x50 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller SPI – Serial Peripheral Interface 23. SPI – Serial Peripheral Interface 23.1 Features • • • • • • • • Overview The Serial Peripheral Interface (SPI) allows high-speed synchronous data transfer between the ATmega8A and peripheral devices or between several AVR devices. Figure 23-1. SPI Block Diagram(1) DIVIDER /2/4/8/16/32/64/128 SPI2X SPI2X 23.
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AVR 8-Bit Microcontroller SPI – Serial Peripheral Interface Note: 1. Refer to Pin Configurations, table Port B Pins Alternate Functions in Alternate Functions of Port B for SPI pin placement. The interconnection between Master and Slave CPUs with SPI is shown in the figure below. The system consists of two shift registers, and a Master Clock generator. The SPI Master initiates the communication cycle when pulling low the Slave Select SS pin of the desired Slave.
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AVR 8-Bit Microcontroller SPI – Serial Peripheral Interface When the SPI is enabled, the data direction of the MOSI, MISO, SCK, and SS pins is overridden according to the table below. For more details on automatic port overrides, refer to Alternate Port Functions. Table 23-1. SPI Pin Overrides(1) Pin Direction, Master SPI Direction, Slave SPI MOSI User Defined Input MISO Input User Defined SCK User Defined Input SS User Defined Input Note: 1.
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AVR 8-Bit Microcontroller SPI – Serial Peripheral Interface The following code examples show how to initialize the SPI as a Slave and how to perform a simple reception.
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AVR 8-Bit Microcontroller SPI – Serial Peripheral Interface 23.3.2 Master Mode When the SPI is configured as a Master (MSTR in SPCR is set), the user can determine the direction of the SS pin. If SS is configured as an output, the pin is a general output pin which does not affect the SPI system. Typically, the pin will be driving the SS pin of the SPI Slave. If SS is configured as an input, it must be held high to ensure Master SPI operation.
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AVR 8-Bit Microcontroller SPI – Serial Peripheral Interface Figure 23-3. SPI Transfer Format with CPHA = 0 SCK (CPOL = 0) mode 0 SCK (CPOL = 1) mode 2 SAMPLE I MOSI/MISO CHANGE 0 MOSI PIN CHANGE 0 MISO PIN SS MSB first (DORD = 0) MSB LSB first (DORD = 1) LSB Bit 6 Bit 1 Bit 5 Bit 2 Bit 4 Bit 3 Bit 3 Bit 4 Bit 2 Bit 5 Bit 1 Bit 6 LSB MSB Figure 23-4.
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AVR 8-Bit Microcontroller SPI – Serial Peripheral Interface 23.5.1 SPCR – SPI Control Register Name: Offset: Reset: Property: SPCR 0x0D [ID-000004d0] 0x00 When addressing I/O Registers as data space the offset address is 0x2D When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller SPI – Serial Peripheral Interface Table 23-4. CPHA Functionality CPHA Leading Edge Trailing Edge 0 Sample Setup 1 Setup Sample Bits 1:0 – SPRn[1:0] SPI Clock Rate Select [n = 1:0] These two bits control the SCK rate of the device configured as a Master. SPR1 and SPR0 have no effect on the Slave. The relationship between SCK and the Oscillator Clock frequency fosc is shown in the table below. Table 23-5.
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AVR 8-Bit Microcontroller SPI – Serial Peripheral Interface 23.5.2 SPSR – SPI Status Register Name: Offset: Reset: Property: SPSR 0x0E [ID-000004d0] 0x00 When addressing I/O Registers as data space the offset address is 0x2E When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller SPI – Serial Peripheral Interface 23.5.3 SPDR – SPI Data Register is a read/write register Name: Offset: Reset: Property: SPDR 0x0F [ID-000004d0] 0xXX When addressing I/O Registers as data space the offset address is 0x2F When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... 24. USART - Universal Synchronous and Asynchronous serial Receiver and Transmitter 24.1 Features • • • • • • • • • • • • 24.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... Figure 24-1. USART Block Diagram(1) Clock Generator UBRRn [H:L] OSC BAUD RATE GENERATOR SYNC LOGIC PIN CONTROL XCKn Transmitter TX CONTROL UDRn(Transmit) DATA BUS PARITY GENERATOR PIN CONTROL TRANSMIT SHIFT REGISTER TxDn Receiver UCSRnA CLOCK RECOVERY RX CONTROL RECEIVE SHIFT REGISTER DATA RECOVERY PIN CONTROL UDRn (Receive) PARITY CHECKER UCSRnB RxDn UCSRnC Note: 1.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... 24.2.1 AVR USART vs. AVR UART – Compatibility The USART is fully compatible with the AVR UART regarding: • • • • • Bit locations inside all USART Registers. Baud Rate Generation. Transmitter Operation. Transmit Buffer Functionality. Receiver Operation. However, the receive buffering has two improvements that will affect the compatibility in some special cases: • • A second Buffer Register has been added.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... Figure 24-2. Clock Generation Logic, Block Diagram UBRRn U2Xn foscn Prescaling Down-Counter UBRRn+1 /2 /4 /2 0 1 0 OSC DDR_XCKn xcki XCKn Pin Sync Register Edge Detector 0 xcko DDR_XCKn 1 UMSELn 1 UCPOLn txclk 1 0 rxclk Signal description: 24.3.1 txclk Transmitter clock (internal signal). rxclk Receiver base clock (internal signal). xcki Input from XCK pin (internal Signal).
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... Table 24-1. Equations for Calculating Baud Rate Register Setting Operating Mode Asynchronous Normal mode (U2X = 0) Asynchronous Double Speed mode (U2X = 1) Synchronous Master mode Equation for Calculating Baud Rate(1) BAUD = BAUD = BAUD = Equation for Calculating UBRR Value �OSC 16 �� + 1 �� = �OSC 2 ��+1 �� = �OSC 8 �� + 1 �� = �OSC −1 16BAUD �OSC −1 8BAUD �OSC −1 2BAUD Note: 1.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... Figure 24-3. Synchronous Mode XCK Timing UCPOL = 1 XCK RxD / TxD Sample UCPOL = 0 XCK RxD / TxD Sample The UCPOL bit UCRSC selects which XCK clock edge is used for data sampling and which is used for data change. As the figure above shows, when UCPOL is zero the data will be changed at rising XCK edge and sampled at falling XCK edge. If UCPOL is set, the data will be changed at falling XCK edge and sampled at rising XCK edge. 24.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... The USART Character Size (UCSZ2:0) bits select the number of data bits in the frame. The USART Parity mode (UPM1:0) bits enable and set the type of parity bit. The selection between one or two stop bits is done by the USART Stop Bit Select (USBS) bit. The Receiver ignores the second stop bit. An FE (Frame Error) will therefore only be detected in the cases where the first stop bit is zero 24.4.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... C Code Example(1) #define FOSC 1843200 // Clock Speed #define BAUD 9600 #define MYUBRR FOSC/16/BAUD-1 void main( void ) { ... USART_Init(MYUBRR) ... } void USART_Init( unsigned int ubrr) { /*Set baud rate */ UBRR0H = (unsigned char)(ubrr>>8); UBRR0L = (unsigned char)ubrr; Enable receiver and transmitter */ UCSRB = (1<
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... Assembly Code Example(1) USART_Transmit: ; Wait for empty transmit buffer sbis UCSRA,UDRE rjmp USART_Transmit ; Put data (r16) into buffer, sends the data out UDR,r16 ret C Code Example(1) void USART_Transmit( unsigned char data ) { /* Wait for empty transmit buffer */ while ( !( UCSRA & (1<
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... Note: 1. These transmit functions are written to be general functions. They can be optimized if the contents of the UCSRB is static. For example, only the TXB8 bit of the UCSRB Register is used after initialization. The ninth bit can be used for indicating an address frame when using multi processor communication mode or for other protocol handling as for example synchronization. 24.6.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... 24.7.1 Receiving Frames with 5 to 8 Data Bits The Receiver starts data reception when it detects a valid start bit. Each bit that follows the start bit will be sampled at the baud rate or XCK clock, and shifted into the Receive Shift Register until the first stop bit of a frame is received. A second stop bit will be ignored by the Receiver. When the first stop bit is received (i.e.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono...
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... changes the buffer read location. Another equality for the error flags is that they can not be altered by software doing a write to the flag location. However, all flags must be set to zero when the UCSRA is written for upward compatibility of future USART implementations. None of the error flags can generate interrupts.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... C Code Example(1) void USART_Flush( void ) { unsigned char dummy; while ( UCSRA & (1<
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... Double Speed mode. The following figure shows the sampling of the data bits and the parity bit. Each of the samples is given a number that is equal to the state of the recovery unit. Figure 24-6.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... D Sum of character size and parity size (D = 5- to 10-bit). S Samples per bit. S = 16 for Normal Speed mode and S = 8 for Double Speed mode. SF First sample number used for majority voting. SF = 8 for Normal Speed and SF = 4 for Double Speed mode. SM Middle sample number used for majority voting. SM = 9 for Normal Speed and SM = 5 for Double Speed mode.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... controllable. The baud rate generator can not always do an exact division of the system frequency to get the baud rate wanted. In this case an UBRR value that gives an acceptable low error can be used if possible. 24.9 Multi-Processor Communication Mode Setting the Multi-processor Communication mode (MPCM) bit in UCSRA enables a filtering function of incoming frames received by the USART Receiver.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... 24.10 Accessing UBRRH/UCSRC Registers The UBRRH Register shares the same I/O location as the UCSRC Register. Therefore some special consideration must be taken when accessing this I/O location. 24.10.1 Write Access When doing a write access of this I/O location, the high bit of the value written, the USART Register Select (URSEL) bit, controls which one of the two registers that will be written.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... in r16,UBRRH in r16,UCSRC ret C Code Example(1) unsigned char USART_ReadUCSRC( void ) { unsigned char ucsrc; /* Read UCSRC */ ucsrc = UBRRH; ucsrc = UCSRC; return ucsrc; } Note: 1. See About Code Examples. The assembly code example returns the UCSRC value in r16.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... 24.11.1 UDR – USART I/O Data Register Name: Offset: Reset: Property: UDR 0x0C 0x00 When addressing I/O Registers as data space the offset address is 0x2C When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... 24.11.2 UCSRA – USART Control and Status Register A Name: Offset: Reset: Property: UCSRA 0x0B 0x20 When addressing I/O Registers as data space the offset address is 0x2B When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... Bit 2 – PE Parity Error This bit is set if the next character in the receive buffer had a Parity Error when received and the parity checking was enabled at that point (UPM1 = 1). This bit is valid until the receive buffer (UDR) is read. Always set this bit to zero when writing to UCSRA. Bit 1 – U2X Double the USART Transmission Speed This bit only has effect for the asynchronous operation.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... 24.11.3 UCSRB – USART Control and Status Register B Name: Offset: Reset: Property: UCSRB 0x0A 0x00 When addressing I/O Registers as data space the offset address is 0x2A When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... Bit 0 – TXB8 Transmit Data Bit 8 TXB8 is the ninth data bit in the character to be transmitted when operating with serial frames with nine data bits. Must be written before writing the low bits to UDR. © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... 24.11.4 UCSRC – USART Control and Status Register C Name: Offset: Reset: Property: UCSRC 0x20 0x06 When addressing I/O Registers as data space the offset address is 0x40 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... Bit 3 – USBS Stop Bit Select This bit selects the number of stop bits to be inserted by the Transmitter. The Receiver ignores this setting. Table 24-6. USBS Bit Settings USBS Stop Bit(s) 0 1-bit 1 2-bit Bits 2:1 – UCSZn[1:0] Character Size [n = 1:0] The UCSZ1:0 bits combined with the UCSZ2 bit in UCSRB sets the number of data bits (Character Size) in a frame the Receiver and Transmitter use. Table 24-7.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... 24.11.5 UBRRL – USART Baud Rate Register Low Name: Offset: Reset: Property: UBRRL 0x09 0x00 When addressing I/O Registers as data space the offset address is 0x29 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... 24.11.6 UBBRH – USART Baud Rate Register High Name: Offset: Reset: Property: UBBRH 0x20 0x00 When addressing I/O Registers as data space the offset address is 0x40 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... Baud Rate [bps] fosc = 1.0000MHz U2X = 0 fosc = 1.8432MHz U2X = 1 U2X= 0 fosc = 2.0000MHz U2X = 1 U2X = 0 U2X = 1 UBRR Error UBRR Error UBRR Error UBRR Error UBRR Error UBRR Error 19.2k 2 8.5% 6 -7.0% 5 0.0% 11 0.0% 6 -7.0% 12 0.2% 28.8k 1 8.5% 3 8.5% 3 0.0% 7 0.0% 3 8.5% 8 -3.5% 38.4k 1 -18.6% 2 8.5% 2 0.0% 5 0.0% 2 8.5% 6 -7.0% 57.6k 0 8.5% 1 8.5% 1 0.0% 3 0.0% 1 8.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... Note: 1. UBRR = 0, Error = 0.0% Table 24-11. Examples of UBRR Settings for Commonly Used Oscillator Frequencies (Continued) Baud Rate [bps] fosc = 8.0000MHz U2X = 0 U2X = 1 UBRR Error UBRR Error 2400 207 0.2% 416 4800 103 0.2% 9600 51 0.2% 14.4k 34 19.2k fosc = 11.0592MHz fosc = 14.7456MHz U2X = 0 U2X = 0 U2X = 1 Error UBRR Error UBRR Error UBRR Error -0.1% 287 0.0% 575 0.0% 383 0.0% 767 0.
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AVR 8-Bit Microcontroller USART - Universal Synchronous and Asynchrono... Baud Rate [bps] fosc = 16.0000MHz fosc = 18.4320MHz fosc = 20.0000MHz U2X = 0 U2X = 0 U2X = 0 U2X = 1 U2X = 1 U2X = 1 UBRR Error UBRR Error UBRR Error UBRR Error UBRR Error 38.4k 25 0.2% 51 0.2% 29 0.0% 59 0.0% 32 -1.4% 64 0.2% 57.6k 16 2.1% 34 -0.8% 19 0.0% 39 0.0% 21 -1.4% 42 0.9% 76.8k 12 0.2% 25 0.2% 14 0.0% 29 0.0% 15 1.7% 32 -1.4% 115.2k 8 -3.5% 16 2.1% 9 0.0% 19 0.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface 25. TWI - Two-wire Serial Interface 25.1 Features • • • • • • • • • • Overview The TWI module is comprised of several submodules, as shown in the following figure. All registers drawn in a thick line are accessible through the AVR data bus. Figure 25-1.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface 25.2.1 SCL and SDA Pins These pins interface the AVR TWI with the rest of the MCU system. The output drivers contain a slewrate limiter in order to conform to the TWI specification. The input stages contain a spike suppression unit removing spikes shorter than 50 ns. Note that the internal pull-ups in the AVR pads can be enabled by setting the PORT bits corresponding to the SCL and SDA pins, as explained in the I/O Port section.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface addressed by a Master. If another interrupt (e.g., INT0) occurs during TWI Power-down address match and wakes up the CPU, the TWI aborts operation and return to it’s idle state. If this cause any problems, ensure that TWI Address Match is the only enabled interrupt when entering Power-down. 25.2.5 Control Unit The Control unit monitors the TWI bus and generates responses corresponding to settings in the TWI Control Register (TWCR).
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface 25.3.1 TWI Terminology The following definitions are frequently encountered in this section. Table 25-1. TWI Terminology 25.3.2 Term Description Master The device that initiates and terminates a transmission. The Master also generates the SCL clock. Slave The device addressed by a Master. Transmitter The device placing data on the bus. Receiver The device reading data from the bus.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface 25.4.2 START and STOP Conditions The Master initiates and terminates a data transmission. The transmission is initiated when the Master issues a START condition on the bus, and it is terminated when the Master issues a STOP condition. Between a START and a STOP condition, the bus is considered busy, and no other master should try to seize control of the bus.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface Figure 25-5. Address Packet Format Addr MSB Addr LSB R/W ACK 7 8 9 SDA SCL 1 2 START 25.4.4 Data Packet Format All data packets transmitted on the TWI bus are nine bits long, consisting of one data byte and an acknowledge bit. During a data transfer, the Master generates the clock and the START and STOP conditions, while the Receiver is responsible for acknowledging the reception.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface Figure 25-7. Typical Data Transmission Addr MSB Addr LSB R/W ACK Data MSB 7 8 9 1 Data LSB ACK 8 9 SDA SCL 1 2 START 25.5 SLA+R/W 2 7 Data Byte STOP Multi-master Bus Systems, Arbitration and Synchronization The TWI protocol allows bus systems with several masters. Special concerns have been taken in order to ensure that transmissions will proceed as normal, even if two or more masters initiate a transmission at the same time.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface Figure 25-8. SCL Synchronization Between Multiple Masters T Alow T Ahigh SCL from Master A TBlow TBhigh SCL from Master B SCL Bus Line Masters Start Counting Low P eriod Masters Start Counting High P eriod Arbitration is carried out by all masters continuously monitoring the SDA line after outputting data. If the value read from the SDA line does not match the value the Master had output, it has lost the arbitration.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface • A REPEATED START and a STOP condition. It is the user software’s responsibility to ensure that these illegal arbitration conditions never occur. This implies that in multi-master systems, all data transfers must use the same composition of SLA+R/W and data packets. In other words: All transmissions must contain the same number of data packets, otherwise the result of the arbitration is undefined.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface 3. 4. 5. 6. 7. The application software should now examine the value of TWSR, to make sure that the START condition was successfully transmitted. If TWSR indicates otherwise, the application software might take some special action, like calling an error routine. Assuming that the status code is as expected, the application must load SLA+W into TWDR. Remember that TWDR is used both for address and data.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface The following table lists assembly and C implementation examples. Note that the code below assumes that several definitions have been made, e.g. by using include-files. Table 25-2.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface The following sections describe each of these modes. Possible status codes are described along with figures detailing data transmission in each of the modes.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface • • • The TWI Enable bit (TWCR.TWEN) must be written to '1' to enable the 2-wire Serial Interface The TWI Start Condition bit (TWCR.TWSTA) must be written to '1' to transmit a START condition The TWI Interrupt Flag (TWCR.TWINT) must be written to '1' to clear the flag. The TWI will then test the 2-wire Serial Bus and generate a START condition as soon as the bus becomes free.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface Status Code (TWSR) Prescaler Bits are 0 Status of the 2-wire Serial Bus and 2-wire Serial Interface Hardware Application Software Response To/from TWDR Next Action Taken by TWI Hardware To TWCR STA STO TWIN T TWE A No TWDR action or 0 1 1 X STOP condition will be transmitted and No TWDR action 1 1 1 X TWSTO Flag will be reset STOP condition followed by a START condition will be transmitted and TWSTO Flag will be reset 0x28 Data b
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface Figure 25-12.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface Figure 25-13. Data Transfer in Master Receiver Mode VCC Device 1 Device 2 MASTER RECEIVER SLAVE TRANSMITTER ........ Device 3 Device n R1 R2 SDA SCL A START condition is sent by writing to the TWI Control register (TWCR) a value of the type TWCR=1x10x10x: • TWCR.TWEN must be written to '1' to enable the 2-wire Serial Interface • TWCR.TWSTA must be written to '1' to transmit a START condition • TWCR.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface Status Code (TWSR) Prescaler Bits are 0 Status of the 2-wire Serial Bus and 2-wire Serial Interface Hardware Application Software Response To/from TWD Next Action Taken by TWI Hardware To TWCR STA STO TWIN T TWE A ACK or NOT ACK will be received 0x10 A repeated START condition has been transmitted Load SLA+R or Load SLA+W 0 0 0 0 1 1 X X SLA+R will be transmitted ACK or NOT ACK will be received SLA+W will be transmitted Logic will swit
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface Figure 25-14.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface Figure 25-15. Data transfer in Slave Receiver mode VCC Device 1 Device 2 SLAVE RECEIVER MASTER TRANSMITTER Device 3 ........ Device n R1 R2 SDA SCL To initiate the SR mode, the TWI (Slave) Address Register (TWAR) and the TWI Control Register (TWCR) must be initialized as follows: The upper seven bits of TWAR are the address to which the 2-wire Serial Interface will respond when addressed by a Master (TWAR.TWA[6:0]).
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface Table 25-5.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface Status Code (TWSR) Status of the 2-wire Serial Bus and 2-wire Serial Interface Hardware Application Software Response To/from TWDR To TWCR STA Prescaler Bits are 0 Next Action Taken by TWI Hardware STO TWI NT TWE A GCA will be recognized if TWGCE = “1” Switched to the not addressed Slave mode; no recognition of own SLA or GCA; a START condition will be transmitted when the bus becomes free Switched to the not addressed Slave mode; own SLA wil
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface Figure 25-16. Formats and States in the Slave Receiver Mode Reception of the o wn sla ve address and one or more data bytes.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface Figure 25-17. Data Transfer in Slave Transmitter Mode VCC Device 1 Device 2 SLAVE TRANSMITTER MASTER RECEIVER Device 3 ........ Device n R1 R2 SDA SCL To initiate the SR mode, the TWI (Slave) Address Register (TWAR) and the TWI Control Register (TWCR) must be initialized as follows: The upper seven bits of TWAR are the address to which the 2-wire Serial Interface will respond when addressed by a Master (TWAR.TWA[6:0]).
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface Note: The 2-wire Serial Interface Data Register (TWDR) does not reflect the last byte present on the bus when waking up from these Sleep modes. Table 25-6.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface Status Code (TWSR) Status of the 2-wire Serial Bus and 2-wire Serial Interface Hardware Application Software Response To/from TWDR To TWCR STA Prescaler Bits are 0 Next Action Taken by TWI Hardware STO TWI NT TWE A GCA will be recognized if TWGCE = “1”; a START condition will be transmitted when the bus becomes free Figure 25-18.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface Table 25-7. Miscellaneous States Status Code (TWSR) Status of the 2-wire Serial Bus and 2-wire Serial Interface Hardware Application Software Response To/from TWDR To TWCR STA Prescaler Bits are 0 Next Action Taken by TWI Hardware STO TWI NT 0xF8 No relevant state information available; TWINT = “0” No TWDR action No TWCR action 0x00 Bus error due to an illegal START or STOP condition No TWDR action 0 25.6.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface Figure 25-20. An Arbitration Example VCC Device 1 Device 2 Device 3 MASTER TRANSMITTER MASTER TRANSMITTER SLAVE RECEIVER ........ Device n R1 R2 SDA SCL Several different scenarios may arise during arbitration, as described below: • • • Two or more masters are performing identical communication with the same Slave. In this case, neither the Slave nor any of the masters will know about the bus contention.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface Figure 25-21. Possible Status Codes Caused by Arbitration START SLA Data Arbitration lost in SLA Own Address / General Call received No STOP Arbitration lost in Data 38 TWI bus will be released and not addressed slave mode will be entered A START condition will be transmitted when the bus becomes free Yes Direction Write 68/78 Read B0 25.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface 25.8.1 TWBR – TWI Bit Rate Register Name: Offset: Reset: Property: TWBR 0x00 0x00 When addressing I/O Registers as data space the offset address is 0x20 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface 25.8.2 TWCR – TWI Control Register Name: Offset: Reset: Property: TWCR 0x36 0x00 When addressing I/O Registers as data space the offset address is 0x56 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses. The TWCR is used to control the operation of the TWI.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface Bit 4 – TWSTO TWI STOP Condition Writing the TWSTO bit to one in Master mode will generate a STOP condition on the 2-wire Serial Bus. When the STOP condition is executed on the bus, the TWSTO bit is cleared automatically. In Slave mode, setting the TWSTO bit can be used to recover from an error condition.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface 25.8.3 TWSR – TWI Status Register Name: Offset: Reset: Property: TWSR 0x01 0xF8 When addressing I/O Registers as data space the offset address is 0x21 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface 25.8.4 TWDR – TWI Data Register Name: Offset: Reset: Property: TWDR 0x03 0xFF When addressing I/O Registers as data space the offset address is 0x23 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses. In Transmit mode, TWDR contains the next byte to be transmitted.
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AVR 8-Bit Microcontroller TWI - Two-wire Serial Interface 25.8.5 TWAR – TWI (Slave) Address Register Name: Offset: Reset: Property: TWAR 0x02 0x7F When addressing I/O Registers as data space the offset address is 0x22 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller AC - Analog Comparator 26. AC - Analog Comparator 26.1 Overview The Analog Comparator compares the input values on the positive pin AIN0 and negative pin AIN1. When the voltage on the positive pin AIN0 is higher than the voltage on the negative pin AIN1, the Analog Comparator Output, ACO, is set. The comparator’s output can be set to trigger the Timer/Counter1 Input Capture function.
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AVR 8-Bit Microcontroller AC - Analog Comparator ACME ADEN MUX[2:0] Analog Comparator Negative Input 1 0 010 ADC2 1 0 011 ADC3 1 0 100 ADC4 1 0 101 ADC5 1 0 110 ADC6 1 0 111 ADC7 Note: ADC7:6 are only available in TQFP and QFN/MLF Package 26.3 Register Description © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller AC - Analog Comparator 26.3.1 SFIOR – Analog Comparator Control and Status Register Name: Offset: Reset: Property: SFIOR 0x30 N/A When addressing I/O Registers as data space the offset address is 0x50 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller AC - Analog Comparator 26.3.2 ACSR – Analog Comparator Control and Status Register Name: Offset: Reset: Property: ACSR 0x08 N/A When addressing I/O Registers as data space the offset address is 0x28 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller AC - Analog Comparator Table 26-2. ACIS[1:0] Settings ACIS1 ACIS0 Interrupt Mode 0 0 Comparator Interrupt on Output Toggle. 0 1 Reserved 1 0 Comparator Interrupt on Falling Output Edge. 1 1 Comparator Interrupt on Rising Output Edge. When changing the ACIS1/ACIS0 bits, the Analog Comparator Interrupt must be disabled by clearing its Interrupt Enable bit in the ACSR Register. Otherwise an interrupt can occur when the bits are changed.
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AVR 8-Bit Microcontroller ADC - Analog to Digital Converter 27. ADC - Analog to Digital Converter 27.1 Features • • • • • • • • • • • • • 27.2 10-bit Resolution 0.5LSB Integral Non-Linearity ±2LSB Absolute Accuracy 13 - 260μs Conversion Time Up to 15kSPS at Maximum Resolution Six Multiplexed Single Ended Input Channels Two Additional Multiplexed Single Ended Input Channels (TQFP and QFN/MLF Package only) Optional Left Adjustment for ADC Result Readout 0 - VCC ADC Input Voltage Range Selectable 2.
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AVR 8-Bit Microcontroller ADC - Analog to Digital Converter Figure 27-1. Analog to Digital Converter Block Schematic Operation ADC CONVERSION COMPLETE IRQ 15 ADC[9:0] ADPS1 ADPS0 ADPS2 ADIF ADFR ADEN ADSC 0 ADC DATA REGISTER (ADCH/ADCL) ADC CTRL. & STATUS REGISTER (ADCSRA) MUX0 MUX2 MUX1 MUX3 ADLAR REFS0 REFS1 ADC MULTIPLEXER SELECT (ADMUX) ADIE ADIF 8-BIT DATA BUS MUX DECODER CHANNEL SELECTION PRESCALER AVCC CONVERSION LOGIC INTERNAL 1.
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AVR 8-Bit Microcontroller ADC - Analog to Digital Converter The ADC generates a 10-bit result which is presented in the ADC Data Registers, ADCH and ADCL. By default, the result is presented right adjusted, but can optionally be presented left adjusted by setting the ADLAR bit in ADMUX. If the result is left adjusted and no more than 8-bit precision is required, it is sufficient to read ADCH.
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AVR 8-Bit Microcontroller ADC - Analog to Digital Converter first conversion after the ADC is switched on (ADEN in ADCSRA is set) takes 25 ADC clock cycles in order to initialize the analog circuitry. The actual sample-and-hold takes place 1.5 ADC clock cycles after the start of a normal conversion and 13.5 ADC clock cycles after the start of an first conversion. When a conversion is complete, the result is written to the ADC Data Registers, and ADIF is set.
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AVR 8-Bit Microcontroller ADC - Analog to Digital Converter Figure 27-5. ADC Timing Diagram, Free Running Conversion One Conversion Cycle Number 11 12 Next Conversion 13 1 2 3 4 ADC Clock ADSC ADIF ADCH Sign and MSB of Result ADCL LSB of Result Sample and Hold Conversion Complete MUX and REFS Update Table 27-1. ADC Conversion Time 27.5 Condition Sample & Hold (Cycles from Start of Conversion) Conversion Time (Cycles) Extended conversion 13.5 25 Normal conversions, single ended 1.
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AVR 8-Bit Microcontroller ADC - Analog to Digital Converter • • In Single Conversion mode, always select the channel before starting the conversion. The channel selection may be changed one ADC clock cycle after writing one to ADSC. However, the simplest method is to wait for the conversion to complete before changing the channel selection. In Free Running mode, always select the channel before starting the first conversion.
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AVR 8-Bit Microcontroller ADC - Analog to Digital Converter channel is selected as input for the ADC. When the channel is selected, the source must drive the S/H capacitor through the series resistance (combined resistance in the input path). The ADC is optimized for analog signals with an output impedance of approximately 10 kΩ or less. If such a source is used, the sampling time will be negligible.
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AVR 8-Bit Microcontroller ADC - Analog to Digital Converter Analog Ground Plane PC2 (ADC2) PC3 (ADC3) PC4 (ADC4/SDA) PC5 (ADC5/SCL) VCC GND Figure 27-7. ADC Power Connections PC1 (ADC1) PC0 (ADC0) ADC7 ADC6 AVCC 100 nF AREF 10 µH GND PB5 Note: If the resistivity in the inductor is too high, the AVCC may exceed its range, VCC - 0.3V < AVCC < VCC + 0.3V 27.6.3 ADC Accuracy Definitions An n-bit single-ended ADC converts a voltage linearly between GND and VREF in 2n steps (LSBs).
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AVR 8-Bit Microcontroller ADC - Analog to Digital Converter Figure 27-8. Offset Error Output Code Ideal ADC Actual ADC Offset Error • VREF Input Voltage Gain error: After adjusting for offset, the gain error is found as the deviation of the last transition (0x3FE to 0x3FF) compared to the ideal transition (at 1.5 LSB below maximum). Ideal value: 0 LSB. Figure 27-9.
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AVR 8-Bit Microcontroller ADC - Analog to Digital Converter Figure 27-10. Integral Non-linearity (INL) Output Code INL Ideal ADC Actual ADC VREF • Input Voltage Differential Non-linearity (DNL): The maximum deviation of the actual code width (the interval between two adjacent transitions) from the ideal code width (1 LSB). Ideal value: 0 LSB. Figure 27-11. Differential Non-linearity (DNL) Output Code 0x3FF 1 LSB DNL 0x000 0 • • 27.
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AVR 8-Bit Microcontroller ADC - Analog to Digital Converter where VIN is the voltage on the selected input pin, and VREF the selected voltage reference (see also descriptions of ADMUX.REFSn and ADMUX.MUX). 0x000 represents analog ground, and 0x3FF represents the selected reference voltage minus one LSB. 27.8 Register Description © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller ADC - Analog to Digital Converter 27.8.1 ADMUX – ADC Multiplexer Selection Register Name: Offset: Reset: Property: ADMUX 0x07 0x00 When addressing I/O Registers as data space the offset address is 0x27 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller ADC - Analog to Digital Converter MUX[3:0] Single Ended Input 0011 ADC3 0100 ADC4 0101 ADC5 0110 ADC6 0111 ADC7 1000 Reserved 1001 Reserved 1010 Reserved 1011 Reserved 1100 Reserved 1101 Reserved 1110 1.30V (VBG) 1111 0V (GND) © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller ADC - Analog to Digital Converter 27.8.2 ADCSRA – ADC Control and Status Register A Name: Offset: Reset: Property: ADCSRA 0x06 0x00 When addressing I/O Registers as data space the offset address is 0x26 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller ADC - Analog to Digital Converter Table 27-4. ADC Prescaler Selections ADPS[2:0] Division Factor 000 2 001 2 010 4 011 8 100 16 101 32 110 64 111 128 © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller ADC - Analog to Digital Converter 27.8.3 ADCL – ADC Data Register Low (ADLAR=0) Name: Offset: Reset: Property: ADCL 0x04 0x00 When addressing I/O Registers as data space the offset address is 0x24 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller ADC - Analog to Digital Converter 27.8.4 ADCH – ADC Data Register High (ADLAR=0) Name: Offset: Reset: Property: ADCH 0x05 0x00 When addressing I/O Registers as data space the offset address is 0x25 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller ADC - Analog to Digital Converter 27.8.5 ADCL – ADC Data Register Low (ADLAR=1) Name: Offset: Reset: Property: ADCL 0x04 0x00 When addressing I/O Registers as data space the offset address is 0x24 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller ADC - Analog to Digital Converter 27.8.6 ADCH – ADC Data Register High (ADLAR=1) Name: Offset: Reset: Property: ADCH 0x05 0x00 When addressing I/O Registers as data space the offset address is 0x25 When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset addresses.
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AVR 8-Bit Microcontroller BTLDR - Boot Loader Support – Read-While-Wri... 28. BTLDR - Boot Loader Support – Read-While-Write Self-Programming 28.1 Features • • • • • • • Read-While-Write Self-Programming Flexible Boot Memory Size High Security (Separate Boot Lock Bits for a Flexible Protection) Separate Fuse to Select Reset Vector Optimized Page(1) Size Code Efficient Algorithm Efficient Read-Modify-Write Support Note: 1. A page is a section in the Flash consisting of several bytes (see Table. No.
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AVR 8-Bit Microcontroller BTLDR - Boot Loader Support – Read-While-Wri... only. The SPM instruction can access the entire Flash, including the BLS itself. The protection level for the Boot Loader section can be selected by the Boot Loader Lock bits (Boot Lock bits 1). 28.4 Read-While-Write and No Read-While-Write Flash Sections Whether the CPU supports Read-While-Write or if the CPU is halted during a Boot Loader software update is dependent on which address that is being programmed.
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AVR 8-Bit Microcontroller BTLDR - Boot Loader Support – Read-While-Wri... Figure 28-1. Read-While-Write vs. No Read-While-Write Read-While-Write (RWW) Section Z-pointer Addresses RWW Section Z-pointer Addresses NRWW Section No Read-While-Write (NRWW) Section CPU is Halted During the Operation Code Located in NRWW Section Can be Read During the Operation © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller BTLDR - Boot Loader Support – Read-While-Wri... Figure 28-2. Memory Sections Related Links ATmega8A Boot Loader Parameters 28.5 Boot Loader Lock Bits If no Boot Loader capability is needed, the entire Flash is available for application code. The Boot Loader has two separate sets of Boot Lock bits which can be set independently. This gives the user a unique flexibility to select different levels of protection.
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AVR 8-Bit Microcontroller BTLDR - Boot Loader Support – Read-While-Wri... • • • To protect only the Boot Loader Flash section from a software update by the MCU To protect only the Application Flash section from a software update by the MCU Allow software update in the entire Flash The Boot Lock bits can be set in software and in Serial or Parallel Programming mode, but they can be cleared by a Chip Erase command only.
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AVR 8-Bit Microcontroller BTLDR - Boot Loader Support – Read-While-Wri... Reset Fuse can be programmed so that the Reset Vector is pointing to the Boot Flash start address after a reset. In this case, the Boot Loader is started after a reset. After the application code is loaded, the program can start executing the application code. The fuses cannot be changed by the MCU itself.
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AVR 8-Bit Microcontroller BTLDR - Boot Loader Support – Read-While-Wri... Figure 28-3. Addressing the Flash During SPM(1) BIT 15 ZPAGEMSB ZPCMSB 1 0 0 Z - REGISTER PROGRAM COUNTER PCMSB PAGEMSB PCPAGE PCWORD PAGE ADDRESS WITHIN THE FLASH WORD ADDRESS WITHIN A PAGE PROGRAM MEMORY PAGE PAGE INSTRUCTION WORD PCWORD[PAGEMSB:0]: 00 01 02 PAGEEND Note: 1.
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AVR 8-Bit Microcontroller BTLDR - Boot Loader Support – Read-While-Wri... If only a part of the page needs to be changed, the rest of the page must be stored (for example in the temporary page buffer) before the erase, and then be rewritten. When using alternative 1, the Boot Loader provides an effective Read-Modify-Write feature which allows the user software to first read the page, do the necessary changes, and then write back the modified data.
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AVR 8-Bit Microcontroller BTLDR - Boot Loader Support – Read-While-Wri... 28.8.5 Consideration While Updating Boot Loader Section (BLS) Special care must be taken if the user allows the Boot Loader Section (BLS) to be updated by leaving Boot Lock bit11 unprogrammed. An accidental write to the Boot Loader itself can corrupt the entire Boot Loader, and further software updates might be impossible.
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AVR 8-Bit Microcontroller BTLDR - Boot Loader Support – Read-While-Wri... Bit 7 6 5 4 3 2 1 0 Rd – – – BLB12 – BLB11 – BLB02 – BLB01 LB2 LB1 The algorithm for reading the Fuse Low bits is similar to the one described above for reading the Lock Bits. To read the Fuse Low bits, load the Z-pointer with 0x0000 and set the BLBSET and SPMEN bits in SPMCR.
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AVR 8-Bit Microcontroller BTLDR - Boot Loader Support – Read-While-Wri... Table 28-5. SPM Programming Time(1) Symbol Min. Programming Time Max. Programming Time Flash write (Page Erase, Page Write, and write Lock bits 3.7ms by SPM) 4.5ms Note: 1. Minimum and maximum programming time is per individual operation. 28.8.
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AVR 8-Bit Microcontroller BTLDR - Boot Loader Support – Read-While-Wri...
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AVR 8-Bit Microcontroller BTLDR - Boot Loader Support – Read-While-Wri... rjmp Wait_spm ; input: spmcrval determines SPM action ; disable interrupts if enabled, store status in temp2, SREG cli ; check that no EEPROM write access is present Wait_ee: sbic EECR, EEWE rjmp Wait_ee ; SPM timed sequence out SPMCR, spmcrval spm ; restore SREG (to enable interrupts if originally enabled) out SREG, temp2 ret 28.8.
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AVR 8-Bit Microcontroller BTLDR - Boot Loader Support – Read-While-Wri... Note: For details about these two section, see NRWW – No Read-While-Write Section and RWW – Read-While-Write Section. Table 28-8. Explanation of Different Variables used in Figure and the Mapping to the Z-pointer, ATmega8A Variable Corresponding Zvalue(1) Description PCMSB 11 Most significant bit in the Program Counter.
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AVR 8-Bit Microcontroller BTLDR - Boot Loader Support – Read-While-Wri... 28.9.1 SPMCR – Store Program Memory Control Register Name: Offset: Reset: Property: SPMCR 0x37 [ID-000004d0] 0x00 When addressing I/O Registers as data space the offset address is 0x57 The Store Program Memory Control and Status Register contains the control bits needed to control the Boot Loader operations. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used.
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AVR 8-Bit Microcontroller BTLDR - Boot Loader Support – Read-While-Wri... Bit 2 – PGWRT Page Write If this bit is written to one at the same time as SPMEN, the next SPM instruction within four clock cycles executes Page Write, with the data stored in the temporary buffer. The page address is taken from the high part of the Zpointer. The data in R1 and R0 are ignored. The PGWRT bit will auto-clear upon completion of a Page Write, or if no SPM instruction is executed within four clock cycles.
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AVR 8-Bit Microcontroller MEMPROG- Memory Programming 29. 29.1 MEMPROG- Memory Programming Program and Data Memory Lock Bits The ATmega8A provides six Lock bits. These can be left unprogrammed ('1') or can be programmed ('0') to obtain the additional features listed in the Lock Bit Protection Modes table below. The Lock Bits can only be erased to “1” with the Chip Erase command. Table 29-1. Lock Bit Byte Bit No.
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AVR 8-Bit Microcontroller MEMPROG- Memory Programming Memory Lock Bits LB Mode LB2 Protection Type LB1 section. If Interrupt Vectors are placed in the Boot Loader section, interrupts are disabled while executing from the Application section. 4 0 1 LPM executing from the Boot Loader section is not allowed to read from the Application section. If Interrupt Vectors are placed in the Boot Loader section, interrupts are disabled while executing from the Application section.
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AVR 8-Bit Microcontroller MEMPROG- Memory Programming High Fuse Byte Bit No. Description Default Value EESAVE 3 EEPROM memory is preserved through 1 (unprogrammed), EEPROM not the Chip Erase reserved BOOTSZ1 2 Select Boot Size (see ATmega8A Boot Loader Parameters) 0 (programmed)(3) BOOTSZ0 1 Select Boot Size (see ATmega8A Boot Loader Parameters) 0 (programmed)(3) BOOTRST 0 Select Reset Vector 1 (unprogrammed) Note: 1. The SPIEN Fuse is not accessible in Serial Programming mode. 2.
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AVR 8-Bit Microcontroller MEMPROG- Memory Programming Clock Sources ATmega8A Boot Loader Parameters Calibrated Internal RC Oscillator Low-frequency Crystal Oscillator 29.2.1 Latching of Fuses The fuse values are latched when the device enters programming mode and changes of the fuse values will have no effect until the part leaves Programming mode. This does not apply to the EESAVE Fuse which will take effect once it is programmed. The fuses are also latched on Power-up in Normal mode. 29.
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AVR 8-Bit Microcontroller MEMPROG- Memory Programming 29.6 Parallel Programming Parameters, Pin Mapping, and Commands This section describes how to parallel program and verify Flash Program memory, EEPROM Data memory, Memory Lock bits, and Fuse bits in the device. Pulses are assumed to be at least 250ns unless otherwise noted. 29.6.
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AVR 8-Bit Microcontroller MEMPROG- Memory Programming Signal Name in Programming Mode Pin Name I/O Function BS1 PD4 I Byte Select 1 (“0” selects Low byte, “1” selects High byte) XA0 PD5 I XTAL Action Bit 0 XA1 PD6 I XTAL Action Bit 1 PAGEL PD7 I Program memory and EEPROM Data Page Load BS2 PC2 I Byte Select 2 (“0” selects Low byte, “1” selects 2’nd High byte) DATA {PC[1:0]: PB[5:0]} I/O Bi-directional Data bus (Output when OE is low) Table 29-9.
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AVR 8-Bit Microcontroller MEMPROG- Memory Programming 29.7 Parallel Programming 29.7.1 Enter Programming Mode The following algorithm puts the device in Parallel Programming mode: 1. 2. 3. 4. Apply 4.5 - 5.5V between VCC and GND, and wait at least 100µs. Set RESET to “0” and toggle XTAL1 at least 6 times Set the Prog_enable pins listed in table Pin Values Used to Enter Programming Mode to “0000” and wait at least 100ns. Apply 11.5 - 12.5V to RESET.
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AVR 8-Bit Microcontroller MEMPROG- Memory Programming 6. 29.7.4 Wait until RDY/BSY goes high before loading a new command. Programming the Flash The Flash is organized in pages. When programming the Flash, the program data is latched into a page buffer. This allows one page of program data to be programmed simultaneously. The following procedure describes how to program the entire Flash memory: Step A. Load Command “Write Flash”. 1. Set XA1, XA0 to “10”. This enables command loading. 2. Set BS1 to “0”. 3.
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AVR 8-Bit Microcontroller MEMPROG- Memory Programming 3. 4. Set DATA = Address high byte (0x00 - 0xFF). Give XTAL1 a positive pulse. This loads the address high byte. Step H. Program Page. 1. Set BS1 = “0” 2. Give WR a negative pulse. This starts programming of the entire page of data. RDY/BSY goes low. 3. Wait until RDY/BSY goes high (Refer to figure Programming the Flash Waveforms in this section). Step I. Repeat B through H until the entire Flash is programmed or until all data has been programmed.
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AVR 8-Bit Microcontroller MEMPROG- Memory Programming Figure 29-3. Programming the Flash Waveform F DATA A B C D E 0x10 ADDR. LOW DATA LOW DATA HIGH XX B ADDR. LOW C D DATA LOW DATA HIGH E XX G ADDR. HIGH H XX XA1 XA0 BS1 XTAL1 WR RDY/BSY RESET+12V OE PAGEL BS2 Note: “XX” is don’t care. The letters refer to the programming description above. 29.7.5 Programming the EEPROM The EEPROM is organized in pages. When programming the EEPROM, the program data is latched into a page buffer.
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AVR 8-Bit Microcontroller MEMPROG- Memory Programming Figure 29-4. Programming the EEPROM Waveforms K DATA A G B 0x11 ADDR. HIGH ADDR. LOW C DATA E XX B ADDR. LOW C DATA E L XX XA1 XA0 BS1 XTAL1 WR RDY/BSY RESET+12V OE PAGEL BS2 29.7.6 Reading the Flash The algorithm for reading the Flash memory is as follows (Please refer to Programming the Flash in this chapter for details on Command and Address loading): 1. 2. 3. 4. 5. 6. 29.7.
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AVR 8-Bit Microcontroller MEMPROG- Memory Programming 29.7.9 Programming the Fuse High Bits The algorithm for programming the Fuse High bits is as follows (Please refer to Programming the Flash for details on Command and Data loading): 1. 2. 3. 4. 5. Step A: Load Command “0100 0000”. Step C: Load Data Low Byte. Bit n = “0” programs and bit n = “1” erases the Fuse bit. Set BS1 to “1” and BS2 to “0”. This selects high data byte. Give WR a negative pulse and wait for RDY/BSY to go high. Set BS1 to “0”.
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AVR 8-Bit Microcontroller MEMPROG- Memory Programming 1. 2. 3. 4. Step A: Load Command “0000 1000”. Step B: Load Address Low Byte (0x00 - 0x02). Set OE to “0”, and BS1 to “0”. The selected Signature byte can now be read at DATA. Set OE to “1”. 29.7.13 Reading the Calibration Byte The algorithm for reading the Calibration byte is as follows (Please refer to Programming the Flash for details on Command and Address loading): 1. 2. 3. Step A: Load Command “0000 1000”.
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AVR 8-Bit Microcontroller MEMPROG- Memory Programming Figure 29-8. Parallel Programming Timing, Reading Sequence (within the same Page) with Timing Requirements(1) LOAD ADDRESS (LOW BYTE) READ DATA (LOW BYTE) READ DATA (HIGH BYTE) LOAD ADDRESS (LOW BYTE) tXLOL XTAL1 tBVDV BS1 tOLDV OE DATA tOHDZ ADDR0 (Low Byte) DATA (Low Byte) ADDR1 (Low Byte) DATA (High Byte) XA0 XA1 Note: 1. The timing requirements shown in the first figure in this section (i.e.
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AVR 8-Bit Microcontroller MEMPROG- Memory Programming Symbol Parameter Min tWLRH_CE WR Low to RDY/BSY High for Chip Erase(2) 7.5 tXLOL XTAL1 Low to OE Low 0 tBVDV BS1 Valid to DATA valid 0 tOLDV tOHDZ Typ Max Units 9 ms ns 250 ns OE Low to DATA Valid 250 ns OE High to DATA Tri-stated 250 ns Note: 1. tWLRH is valid for the Write Flash, Write EEPROM, Write Fuse Bits and Write Lock Bits commands. 2. tWLRH_CE is valid for the Chip Erase command. 29.
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AVR 8-Bit Microcontroller MEMPROG- Memory Programming Figure 29-9. Serial Programming and Verify(1) +2.7 - 5.5V VCC MOSI PB5 MISO PB6 SCK PB7 +2.7 - 5.5V (2) AVCC XTAL1 RESET GND Note: 1. If the device is clocked by the Internal Oscillator, it is no need to connect a clock source to the XTAL1 pin. 2. VCC - 0.3 < AVCC < VCC + 0.3, however, AVCC should always be within 2.7 - 5.5V.
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AVR 8-Bit Microcontroller MEMPROG- Memory Programming 2. 3. 4. 5. 6. 7. 8. 9. Wait for at least 20ms and enable serial programming by sending the Programming Enable serial instruction to pin MOSI. The serial programming instructions will not work if the communication is out of synchronization. When in sync. the second byte (0x53), will echo back when issuing the third byte of the Programming Enable instruction. Whether the echo is correct or not, all four bytes of the instruction must be transmitted.
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AVR 8-Bit Microcontroller MEMPROG- Memory Programming Table 29-14. Minimum Wait Delay Before Writing the Next Flash or EEPROM Location Symbol Minimum Wait Delay tWD_FUSE 4.5ms tWD_FLASH 4.5ms tWD_EEPROM 9.0ms tWD_ERASE 9.0ms Figure 29-10. Serial Programming Waveforms SERIAL DATA INPUT (MOSI) MSB LSB SERIAL DATA OUTPUT (MISO) MSB LSB SERIAL CLOCK INPUT (SCK) SAMPLE Table 29-15.
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AVR 8-Bit Microcontroller MEMPROG- Memory Programming Instruction Format Instruction Byte 1 Byte 2 Byte 3 Byte 4 Operation Write Fuse Bits 1010 1100 1010 0000 xxxx xxxx iiii iiii Set bits = “0” to program, “1” to unprogram. See Table Fuse Low Byte for details. Write Fuse High Bits 1010 1100 1010 1000 xxxx xxxx iiii iiii Set bits = “0” to program, “1” to unprogram. See Table Fuse High Byte for details. Read Fuse Bits 0101 0000 0000 0000 xxxx xxxx oooo oooo Read Fuse Bits.
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AVR 8-Bit Microcontroller Electrical Characteristics – TA = -40°C to 8... 30. Electrical Characteristics – TA = -40°C to 85°C Note: Typical values contained in this datasheet are based on simulations and characterization of other AVR microcontrollers manufactured on the same process technology. Min and Max values will be available after the device is characterized. Table 30-1. Absolute Maximum Ratings* 30.
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AVR 8-Bit Microcontroller Electrical Characteristics – TA = -40°C to 8... Symbol Parameter Condition Min VIL3 Input Low Voltage RESET pin as I/O VCC = 2.7V - 5.5V -0.5 0.2 VCC VIH3 Input High Voltage RESET pin as I/O VCC = 2.7V - 5.5V 0.6 VCC(2) 0.7 VCC(2) VCC + 0.5 V VOL Output Low Voltage(3) (Ports B,C,D) IOL = 20mA, VCC = 5V IOL = 10mA, VCC = 3V VOH Output High Voltage(4) (Ports B,C,D) IOH = -20mA, VCC = 5V IOH = -10mA, VCC = 3V IIL Input Leakage Current I/O Pin VCC = 5.
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AVR 8-Bit Microcontroller Electrical Characteristics – TA = -40°C to 8... If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test condition. 4. Although each I/O port can source more than the test conditions (20mA at VCC = 5V, 10mA at VCC = 3V) under steady state conditions (non-transient), the following must be observed: PDIP, TQFP, and QFN/MLF Package: 1] The sum of all IOH, for all ports, should not exceed 300mA.
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AVR 8-Bit Microcontroller Electrical Characteristics – TA = -40°C to 8... 30.3.2 External Clock Drive Table 30-3. External Clock Drive Symbol Parameter VCC = 2.7V to 5.5V VCC = 4.5V to 5.5V Min Max Min Max 8 0 16 Units 1/tCLCL Oscillator Frequency 0 MHz tCLCL Clock Period 125 62.5 ns tCHCX High Time 50 25 ns tCLCX Low Time 50 25 ns tCLCH Rise Time 1.6 0.5 μs tCHCL Fall Time 1.6 0.5 μs ΔtCLCL Change in period from one clock cycle to the next 2 2 % Table 30-4.
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AVR 8-Bit Microcontroller Electrical Characteristics – TA = -40°C to 8... Symbol Parameter Condition Min Typ Max Units tBG Bandgap reference start-up time 40 IBG Bandgap reference current consumption 10 70 μs μs Note: 1. The Power-on Reset will not work unless the supply voltage has been below VPOT (falling). 2. VBOT may be below nominal minimum operating voltage for some devices. For devices where this is the case, the device is tested down to VCC = VBOT during the production test.
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AVR 8-Bit Microcontroller Electrical Characteristics – TA = -40°C to 8... Symbol Parameter Condition Min Max Units tHD;STA fSCL ≤ 100kHz 4.0 – μs fSCL > 100kHz 0.6 – μs fSCL ≤ 100kHz(6) 4.7 – μs fSCL > 100kHz(7) 1.3 – μs fSCL ≤ 100kHz 4.0 – μs fSCL > 100kHz 0.6 – μs fSCL ≤ 100kHz 4.7 – μs fSCL > 100kHz 0.6 – μs fSCL ≤ 100kHz 0 3.45 μs fSCL > 100kHz 0 0.9 μs fSCL ≤ 100kHz 250 – ns fSCL > 100kHz 100 – ns fSCL ≤ 100kHz 4.0 – μs fSCL > 100kHz 0.
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AVR 8-Bit Microcontroller Electrical Characteristics – TA = -40°C to 8... 30.6 SPI Timing Characteristics See figures below for details. Table 30-7. SPI Timing Parameters Description Mode Min Typ 1 SCK period Master See Table 23-5 2 SCK high/low Master 50% duty cycle 3 Rise/Fall time Master 3.6 4 Setup Master 10 5 Hold Master 10 6 Out to SCK Master 0.
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AVR 8-Bit Microcontroller Electrical Characteristics – TA = -40°C to 8... Figure 30-4. SPI interface timing requirements (Master Mode) SS 6 1 SCK (CPOL = 0) 2 2 SCK (CPOL = 1) 4 MISO (Data Input) 5 3 MSB ... LSB 8 7 MOSI (Data Output) MSB ... LSB SPI interface timing requirements (Slave Mode) 18 SS 10 9 16 SCK (CPOL = 0) 11 11 SCK (CPOL = 1) 13 MOSI (Data Input) 14 12 MSB ... LSB 17 15 MISO (Data Output) MSB ... LSB X Related Links SPCR 30.
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AVR 8-Bit Microcontroller Electrical Characteristics – TA = -40°C to 8... Symbol Parameter Condition Min(1) Single Ended Conversion VREF = 4V, VCC = 4V Typ(1) Max(1) Units 3 LSB 0.75 LSB 0.
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AVR 8-Bit Microcontroller Electrical Characteristics – TA = -40°C to 1... 31. Electrical Characteristics – TA = -40°C to 105°C Absolute Maximum Ratings* 31.1 Operating Temperature -55°C to +125°C Storage Temperature -65°C to +150°C Voltage on any Pin except RESET with respect to Ground -0.5V to VCC +0.5V Voltage on RESET with respect to Ground -0.5V to +13.0V Maximum Operating Voltage 6.0V DC Current per I/O Pin 40.0mA DC Current VCC and GND Pins 200.
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AVR 8-Bit Microcontroller Electrical Characteristics – TA = -40°C to 1... Symbol Parameter Condition Min. Typ. Max. Units IIL Input Leakage Current I/O Pin 3 μA IIH Input Leakage Current I/O Pin 3 μA RRST Reset Pull-up Resistor 30 80 kΩ RPU I/O Pin Pull-up Resistor 20 50 kΩ VACIO Analog Comparator Input Offset Voltage VCC = 5V Vin = VCC/2 20 mV IACLK Analog Comparator Input Leakage Current VCC = 5V Vin = VCC/2 50 nA -50 Note: 1.
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AVR 8-Bit Microcontroller Electrical Characteristics – TA = -40°C to 1... Symbol Parameter Condition Power-down mode(1) Min. Typ. Max. Units WDT enabled, VCC = 3V 35 μA WDT disabled, VCC = 3V 6 μA Note: 1. The current consumption values include input leakage current. © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C 32. Typical Characteristics – TA = -40°C to 85°C The following charts show typical behavior. These figures are not tested during manufacturing. All current consumption measurements are performed with all I/O pins configured as inputs and with internal pullups enabled. A sine wave generator with Rail-to-Rail output is used as clock source. The power consumption in Power-down mode is independent of clock selection.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-2. Active Supply Current vs. Frequency (1 - 16MHz) ACTIVE SUPPLY CURRENT vs. FREQUENCY 1 - 16 MHZ 14 5.5 V 12 5.0 V ICC (mA) 10 4.5 V 8 4.0 V 6 3.6 V 3.3 V 4 2.7 V 2 0 0 2 4 6 8 10 12 14 16 Frequency (MHz) Figure 32-3. Active Supply Current vs. VCC (Internal RC Oscillator, 8MHz) ACTIVE SUPPLY CURRENT vs. VCC INTERNAL RC OSCILLATOR, 8 MHz 10 -40 °C 25 °C 85 °C 9 ICC (mA) 8 7 6 5 4 3 2.5 3 3.5 4 4.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-4. Active Supply Current vs. VCC (Internal RC Oscillator, 4MHz) ACTIVE SUPPLY CURRENT vs. VCC INTERNAL RC OSCILLATOR, 4 MHz 6 -40 °C 5.5 25 °C 5 85 °C ICC (mA) 4.5 4 3.5 3 2.5 2 1.5 2.5 3 3.5 4 4.5 5 5.5 VCC (V) Figure 32-5. Active Supply Current vs. VCC (Internal RC Oscillator, 2MHz) ACTIVE SUPPLY CURRENT vs. VCC INTERNAL RC OSCILLATOR, 2 MHz 3.6 -40 °C 25 °C 3.2 85 °C ICC (mA) 2.8 2.4 2 1.6 1.2 2.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-6. Active Supply Current vs. VCC (Internal RC Oscillator, 1MHz) ACTIVE SUPPLY CURRENT vs. VCC INTERNAL RC OSCILLATOR, 1 MHz 1.9 25 °C 85 °C -40 °C 1.8 1.7 ICC (mA) 1.6 1.5 1.4 1.3 1.2 1.1 1 2.5 3 3.5 4 4.5 5 5.5 VCC (V) Figure 32-7. Active Supply Current vs. VCC (32kHz External Oscillator) ACTIVE SUPPLY CURRENT vs. VCC EXTERNAL OSCILLATOR, 32 kHz 70 25 °C 65 ICC (µA) 60 55 50 45 40 2.5 3 3.5 4 4.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Idle Supply Current Figure 32-8. Idle Supply Current vs. Frequency (0.1 - 1.0MHz) IDLE SUPPLY CURRENT vs. LOW FREQUENCY 0.1 - 1.0 MHz 0.35 5.5 V 0.3 5.0 V ICC (mA) 0.25 4.5 V 0.2 4.0 V 0.15 3.6 V 3.3 V 2.7 V 0.1 0.05 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Frequency (MHz) Figure 32-9. Idle Supply Current vs. Frequency (1 - 16MHz) IDLE SUPPLY CURRENT vs. FREQUENCY 1 - 16 MHz 6 5.5 V 5 5.0 V 4 ICC (mA) 32.2 4.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-10. Idle Supply Current vs. VCC (Internal RC Oscillator, 8MHz) IDLE SUPPLY CURRENT vs. VCC INTERNAL RC OSCILLATOR, 8 MHz 4 -40 °C 25 °C 85 °C 3.5 ICC (mA) 3 2.5 2 1.5 1 2.5 3 3.5 4 4.5 5 5.5 VCC (V) Figure 32-11. Idle Supply Current vs. VCC (Internal RC Oscillator, 4MHz) IDLE SUPPLY CURRENT vs. VCC INTERNAL RC OSCILLATOR, 4 MHz -40 °C 25 °C 85 °C 2 1.8 ICC (mA) 1.6 1.4 1.2 1 0.8 0.6 2.5 3 3.5 4 4.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-12. Idle Supply Current vs. VCC (Internal RC Oscillator, 2MHz) IDLE SUPPLY CURRENT vs. VCC INTERNAL RC OSCILLATOR, 2 MHz 1 85 °C 25 °C -40 °C ICC (mA) 0.8 0.6 0.4 0.2 0 2.5 3 3.5 4 4.5 5 5.5 VCC (V) Figure 32-13. Idle Supply Current vs. VCC (Internal RC Oscillator, 1MHz) IDLE SUPPLY CURRENT vs. VCC INTERNAL RC OSCILLATOR, 1 MHz 0.5 85 °C 25 °C -40 °C ICC (mA) 0.4 0.3 0.2 0.1 0 2.5 3 3.5 4 4.5 5 5.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-14. Idle Supply Current vs. VCC (32kHz External Oscillator) IDLE SUPPLY CURRENT vs. VCC 32kHz EXTERNAL OSCILLATOR 25 ICC (uA) 20 25 °C 15 10 5 0 2.5 3 3.5 4 4.5 5 5.5 VCC (V) Power-down Supply Current Figure 32-15. Power-down Supply Current vs. VCC (Watchdog Timer Disabled) POWER-DOWN SUPPLY CURRENT vs. VCC WATCHDOG TIMER DISABLED 2.5 85 °C 2 ICC (uA) 32.3 -40 °C 25 °C 1.5 1 0.5 0 2.5 3 3.5 4 4.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Power-down Supply Current vs. VCC (Watchdog Timer Enabled) POWER-DOWN SUPPLY CURRENT vs. VCC WATCHDOG TIMER ENABLED 25 85 °C 25 °C -40 °C ICC (uA) 20 15 10 5 0 2.5 3 3.5 4 4.5 5 5.5 VCC (V) Power-save Supply Current Figure 32-16. Power-save Supply Current vs. VCC (Watchdog Timer Disabled) POWER-SAVE SUPPLY CURRENT vs. VCC WATCHDOG TIMER DISABLED 10 25 °C 8 ICC (uA) 32.4 6 4 2 2.5 3 3.5 4 4.5 5 5.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Standby Supply Current Figure 32-17. Standby Supply Current vs. VCC (455kHz Resonator, Watchdog Timer Disabled) STANDBY SUPPLY CURRENT vs. VCC 450 kHZ RESONATOR, WATCHDOG TIMER DISABLED 60 25 °C 50 ICC (uA) 40 30 20 10 0 2.5 3 3.5 4 4.5 5 5.5 VCC (V) Figure 32-18. Standby Supply Current vs. VCC (1MHz Resonator, Watchdog Timer Disabled) STANDBY SUPPLY CURRENT vs.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-19. Standby Supply Current vs. VCC (1MHz Xtal, Watchdog Timer Disabled) STANDBY SUPPLY CURRENT vs. VCC 1 MHz XTAL, WATCHDOG TIMER DISABLED 60 25 °C 50 ICC (uA) 40 30 20 10 0 2.5 3 3.5 4 4.5 5 5.5 VCC (V) Figure 32-20. Standby Supply Current vs. VCC (4MHz Resonator, Watchdog Timer Disabled) STANDBY SUPPLY CURRENT vs. VCC 4 MHz RESONATOR, WATCHDOG TIMER DISABLED 90 25 °C 75 ICC (uA) 60 45 30 15 0 2.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-21. Standby Supply Current vs. VCC (4MHz Xtal, Watchdog Timer Disabled) STANDBY SUPPLY CURRENT vs. VCC 4 MHz XTAL, WATCHDOG TIMER DISABLED 80 25 °C 70 60 ICC (uA) 50 40 30 20 10 0 2.5 3 3.5 4 4.5 5 5.5 VCC (V) Figure 32-22. Standby Supply Current vs. VCC (6MHz Resonator, Watchdog Timer Disabled) STANDBY SUPPLY CURRENT vs. VCC 6 MHz RESONATOR, WATCHDOG TIMER DISABLED 100 25 °C ICC (uA) 80 60 40 20 0 2.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-23. Standby Supply Current vs. VCC (6MHz Xtal, Watchdog Timer Disabled) STANDBY SUPPLY CURRENT vs. VCC 6 MHz XTAL, WATCHDOG TIMER DISABLED 120 25 °C 100 ICC (uA) 80 60 40 20 0 2.5 3 3.5 4 4.5 5 5.5 VCC (V) Pin Pull-up Figure 32-24. I/O Pin Pull-up Resistor Current vs. Input Voltage (VCC = 5V) I/O PIN PULL-UP RESISTOR CURRENT vs. INPUT VOLTAGE Vcc = 5V 140 120 100 IOP (uA) 32.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-25. I/O Pin Pull-up Resistor Current vs. Input Voltage (VCC = 2.7V) I/O PIN PULL-UP RESISTOR CURRENT vs. INPUT VOLTAGE Vcc = 2.7V 80 70 60 IOP (uA) 50 40 30 20 10 -40 °C 85 °C 25 °C 0 0 0.5 1 1.5 2 2.5 3 VOP (V) Figure 32-26. Reset Pull-up Resistor Current vs. Reset Pin Voltage (VCC = 5V) RESET PULL-UP RESISTOR CURRENT vs.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-27. Reset Pull-up Resistor Current vs. Reset Pin Voltage (VCC = 2.7V) RESET PULL-UP RESISTOR CURRENT vs. RESET PIN VOLTAGE Vcc = 2.7V 60 50 IRESET (uA) 40 30 20 10 85 °C -40 °C 25 °C 0 0 0.5 1 1.5 2 2.5 3 VRESET (V) Pin Driver Strength Figure 32-28. I/O Pin Output Voltage vs. Source Current (VCC = 5.0V) I/O PIN OUTPUT VOLTAGE vs. SOURCE CURRENT VCC = 5V 5 4.9 4.8 VOH (V) 32.7 4.7 4.6 -40 °C 4.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-29. I/O Pin Output Voltage vs. Source Current (VCC = 3.0V) I/O PIN OUTPUT VOLTAGE vs. SOURCE CURRENT VCC = 3V 3.5 VOH (V) 3 2.5 -40 °C 25 °C 85 °C 2 1.5 1 0 4 8 12 16 20 IOH (mA) Figure 32-30. I/O Pin Output Voltage vs. Sink Current (VCC = 5.0V) I/O PIN OUTPUT VOLTAGE vs. SINK CURRENT VCC = 5V 0.6 85 °C 0.5 25 °C VOL (V) 0.4 -40 °C 0.3 0.2 0.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-31. I/O Pin Output Voltage vs. Sink Current (VCC = 3.0V) I/O PIN OUTPUT VOLTAGE vs. SINK CURRENT VCC = 3V 1 85 °C 0.8 25 °C VOL (V) 0.6 -40 °C 0.4 0.2 0 0 2 4 6 8 10 12 14 16 18 20 IOL (mA) Figure 32-32. Reset Pin as I/O - Pin Source Current vs. Output Voltage (VCC = 5.0V) RESET PIN AS I/O - SOURCE CURRENT vs. OUTPUT VOLTAGE VCC = 5V 5 85 °C 4 Current (mA) 25 °C 3 -40 °C 2 1 0 2 2.5 3 3.5 4 4.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-33. Reset Pin as I/O - Pin Source Current vs. Output Voltage (VCC = 2.7V) RESET PIN AS I/O - SOURCE CURRENT vs. OUTPUT VOLTAGE VCC = 2.7V 4 -40 °C 3.5 Current (mA) 3 25 °C 2.5 2 85 °C 1.5 1 0.5 0 0 0.5 1 1.5 2 2.5 VOH (V) Figure 32-34. Reset Pin as I/O - Pin Sink Current vs. Output Voltage (VCC = 5.0V) RESET PIN AS I/O - SINK CURRENT vs.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-35. Reset Pin as I/O - Pin Sink Current vs. Output Voltage (VCC = 2.7V) RESET PIN AS I/O - SINK CURRENT vs. OUTPUT VOLTAGE VCC = 2.7V 4.5 -40 °C 4 3.5 25 °C Current (mA) 3 85 °C 2.5 2 1.5 1 0.5 0 0 0.5 1 1.5 2 VOL (V) Pin Thresholds and Hysteresis Figure 32-36. I/O Pin Input Threshold Voltage vs. VCC (VIH, I/O Pin Read as “1”) I/O PIN INPUT THRESHOLD VOLTAGE vs.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-37. I/O Pin Input Threshold Voltage vs. VCC (VIL, I/O Pin Read as “0”) I/O PIN INPUT THRESHOLD VOLTAGE vs. VCC VIL, IO PIN READ AS '0' 85 °C 25 °C -40 °C 2.5 Threshold (V) 2 1.5 1 0.5 0 2.5 3 3.5 4 4.5 5 5.5 VCC (V) Figure 32-38. I/O Pin Input Hysteresis vs. VCC I/O PIN INPUT HYSTERESIS vs. VCC 0.5 -40 °C 25 °C 85 °C Input Hysteresis (mV) 0.45 0.4 0.35 0.3 0.25 0.2 2.5 3 3.5 4 4.5 5 5.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-39. Reset Pin as I/O - Input Threshold Voltage vs. VCC (VIH, Reset Pin Read as “1”) RESET PIN AS I/O - INPUT THRESHOLD VOLTAGE vs. VCC VIH, RESET PIN READ AS '1' 3 85 °C -40 °C 25 °C 2.5 Threshold (V) 2 1.5 1 0.5 0 2.5 3 3.5 4 4.5 5 5.5 VCC (V) Figure 32-40. Reset Pin as I/O - Input Threshold Voltage vs. VCC (VIL, Reset Pin Read as “0”) RESET PIN AS I/O - INPUT THRESHOLD VOLTAGE vs.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-41. Reset Pin as I/O - Pin Hysteresis vs. VCC RESET PIN AS IO, PIN HYSTERESIS vs. VCC 0.5 85 °C -40 °C 25 °C Input Hysteresis (mV) 0.4 0.3 0.2 0.1 0 2.5 3 3.5 4 4.5 5 5.5 VCC (V) Figure 32-42. Reset Input Threshold Voltage vs. VCC (VIH, Reset Pin Read as “1”) RESET INPUT THRESHOLD VOLTAGE vs. VCC VIH, RESET PIN READ AS '1' 2.5 85 °C -40 °C 25 °C Threshold (V) 2 1.5 1 0.5 0 2.5 3 3.5 4 4.5 5 5.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-43. Reset Input Threshold Voltage vs. VCC (VIL, Reset Pin Read as “0”) RESET INPUT THRESHOLD VOLTAGE vs. VCC VIL, RESET PIN READ AS '0' 2.5 85 °C 25 °C -40 °C Threshold (V) 2 1.5 1 0.5 0 2.5 3 3.5 4 4.5 5 5.5 VCC (V) Figure 32-44. Reset Input Pin Hysteresis vs. VCC RESET INPUT PIN HYSTERESIS vs. VCC 0.5 Input Hysteresis (mV) 0.4 0.3 0.2 0.1 85 °C 25 °C -40 °C 0 2.5 3 3.5 4 4.5 5 5.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Bod Thresholds and Analog Comparator Offset Figure 32-45. BOD Thresholds vs. Temperature (BOD Level is 4.0V) BOD THRESHOLDS vs. TEMPERATURE BOD LEVEL IS 4.0V 3.95 Rising Vcc Threshold (V) 3.9 3.85 3.8 Falling Vcc 3.75 3.7 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 70 80 90 Temperature (°C) Figure 32-46. BOD Thresholds vs. Temperature (BOD Level is 2.7v) BOD THRESHOLDS vs. TEMPERATURE BOD LEVEL IS 2.7V 2.8 2.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-47. Bandgap Voltage vs. VCC BANDGAP VOLTAGE vs. VCC 1.215 85 °C 25 °C Bandgap Voltage (V) 1.21 1.205 -40 °C 1.2 1.195 1.19 1.185 1.18 2.5 3 3.5 4 4.5 5 5.5 Vcc (V) Figure 32-48. Analog Comparator Offset Voltage vs. Common Mode Voltage (VCC = 5V) ANALOG COMPARATOR OFFSET VOLTAGE vs. COMMON MODE VOLTAGE VCC = 5V 0.003 0.002 Comparator Offset Voltage (V) 0.001 85 °C 0 25 °C -0.001 -0.002 -0.003 -40 °C -0.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-49. Analog Comparator Offset Voltage vs. Common Mode Voltage (VCC = 2.8V) ANALOG COMPARATOR OFFSET VOLTAGE vs. COMMON MODE VOLTAGE VCC = 2.8V 0.003 Comparator Offset Voltage (V) 0.002 25 °C 85 °C 0.001 0 -0.001 -40 °C -0.002 -0.003 -0.004 0.25 0.50 0.75 1.00 1.25 1.5 1.75 2.00 2.25 2.50 2.75 Common Mode Voltage (V) Internal Oscillator Speed Figure 32-50. Watchdog Oscillator Frequency vs.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-51. Calibrated 8MHz RC Oscillator Frequency vs. Temperature CALIBRATED 8 MHz RC OSCILLATOR FREQUENCY vs. TEMPERATURE 8,5 8 FRC (MHz) 5.5 V 7,5 4.0 V 7 2.7 V 6,5 6 -40 -20 0 20 40 60 80 100 Temperature (°C) Figure 32-52. Calibrated 8MHz RC Oscillator Frequency vs. VCC CALIBRATED 8 MHz RC OSCILLATOR FREQUENCY vs. VCC 8.5 -40 °C 25 °C 8 FRC (MHz) 85 °C 7.5 7 6.5 6 2.5 3 3.5 4 4.5 5 5.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-53. Calibrated 8MHz RC Oscillator Frequency vs. Osccal Value CALIBRATED 8 MHz RC OSCILLATOR FREQUENCY vs. OSCCAL VALUE 14 25 °C 12 FRC (MHz) 10 8 6 4 2 0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 256 OSCCAL VALUE Figure 32-54. Calibrated 4MHz RC Oscillator Frequency vs. Temperature CALIBRATED 4 MHz RC OSCILLATOR FREQUENCY vs. TEMPERATURE 4.1 4 5.5 V FRC (MHz) 3.9 4.0 V 3.8 3.7 2.7 V 3.6 3.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-55. Calibrated 4MHz RC Oscillator Frequency vs. VCC CALIBRATED 4 MHz RC OSCILLATOR FREQUENCY vs. VCC 4.1 -40 °C 25 °C 4 85 °C FRC (MHz) 3.9 3.8 3.7 3.6 3.5 2.5 3 3.5 4 4.5 5 5.5 VCC (V) Figure 32-56. Calibrated 4MHz RC Oscillator Frequency vs. Osccal Value CALIBRATED 4 MHz RC OSCILLATOR FREQUENCY vs.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-57. Calibrated 2MHz RC Oscillator Frequency vs. Temperature CALIBRATED 2 MHz RC OSCILLATOR FREQUENCY vs. TEMPERATURE 2.1 2.05 5.5 V FRC (MHz) 2 1.95 4.0 V 1.9 2.7 V 1.85 1.8 1.75 -40 -20 0 20 40 60 80 100 Temperature (°C) Figure 32-58. Calibrated 2MHz RC Oscillator Frequency vs. VCC CALIBRATED 2 MHz RC OSCILLATOR FREQUENCY vs. VCC 2.1 -40 °C 25 °C 2.05 85 °C FRC (MHz) 2 1.95 1.9 1.85 1.8 2.5 3 3.5 4 4.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-59. Calibrated 2MHz RC Oscillator Frequency vs. Osccal Value CALIBRATED 2 MHz RC OSCILLATOR FREQUENCY vs. OSCCAL VALUE 3 25 °C FRC (MHz) 2.5 2 1.5 1 0.5 0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 256 OSCCAL VALUE Figure 32-60. Calibrated 1MHz RC Oscillator Frequency vs. Temperature CALIBRATED 1 MHz RC OSCILLATOR FREQUENCY vs. TEMPERATURE 1.04 1.02 5.5 V FRC (MHz) 1 0.98 4.0 V 0.96 0.94 2.7 V 0.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-61. Calibrated 1MHz RC Oscillator Frequency vs. VCC CALIBRATED 1 MHz RC OSCILLATOR FREQUENCY vs. VCC 1.04 -40 °C 25 °C 1.02 85 °C FRC (MHz) 1 0.98 0.96 0.94 0.92 0,9 2.5 3 3.5 4 4.5 5 5.5 VCC (V) Figure 32-62. Calibrated 1MHz RC Oscillator Frequency vs. Osccal Value CALIBRATED 1 MHz RC OSCILLATOR FREQUENCY vs. OSCCAL VALUE 1.6 25 °C 1.4 FRC (MHz) 1.2 1 0.8 0.6 0.4 0.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Current Consumption of Peripheral Units Figure 32-63. Brown-out Detector Current vs. VCC BROWN-OUT DETECTOR CURRENT vs. VCC 20 -40 °C 25 °C 16 ICC (uA) 85 °C 12 8 4 0 2.5 3 3.5 4 4.5 5 5.5 VCC (V) Figure 32-64. ADC Current vs. VCC (AREF = AVCC) ADC CURRENT vs. VCC AREF = AVCC 300 275 -40 °C 25 °C 85 °C 250 225 ICC (uA) 32.11 200 175 150 125 100 2.5 3 3.5 4 4.5 5 5.5 VCC (V) © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-65. AREF External Reference Current vs. VCC AREF EXTERNAL REFERENCE CURRENT vs. VCC 85 °C 25 °C -40 °C 160 140 ICC (uA) 120 100 80 60 40 2.5 3 3.5 4 4.5 5 5.5 VCC (V) Figure 32-66. 32kHz TOSC Current vs. VCC (Watchdog Timer Disabled) 32 kHz TOSC CURRENT vs. VCC WATCHDOG TIMER DISABLED 10 85 °C 25 °C ICC (uA) 8 -40 °C 6 4 2 0 2.5 3 3.5 4 4.5 5 5.5 VCC (V) © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-67. Watchdog Timer Current vs. VCC WATCHDOG TIMER CURRENT vs. VCC 20 85 °C 25 °C -40 °C ICC (uA) 16 12 8 4 0 2.5 3 3.5 4 4.5 5 5.5 VCC (V) Figure 32-68. Analog Comparator Current vs. VCC ANALOG COMPARATOR CURRENT vs. VCC 70 85 °C 60 25 °C ICC (uA) 50 -40 °C 40 30 20 10 0 2.5 3 3.5 4 4.5 5 5.5 VCC (V) © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-69. Programming Current vs. VCC PROGRAMMING CURRENT vs. VCC 6 -40 °C 5 25 °C ICC (mA) 4 85 °C 3 2 1 0 2.5 3 3.5 4 4.5 5 5.5 VCC (V) Current Consumption in Reset and Reset Pulsewidth Figure 32-70. Reset Supply Current vs. VCC (0.1 - 1.0MHz, Excluding Current Through The Reset Pull-up) RESET SUPPLY CURRENT vs. VCC 0.1 - 1.0 MHz EXCLUDING CURRENT THROUGH THE RESET PULLUP 3 5.5 V 5.0 V 2.5 4.5 V ICC (mA) 32.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 85°C Figure 32-71. Reset Supply Current vs. VCC (1 - 16MHz, Excluding Current Through The Reset Pull-up) RESET SUPPLY CURRENT vs. VCC 1 - 16 MHz EXCLUDING CURRENT THROUGH THE RESET PULLUP 12 5.5 V 10 5.0 V 4.5 V ICC (mA) 8 6 4.0 V 3.6 V 4 3.3 V 2.7 V 2 0 0 2 4 6 8 10 12 14 16 Frequency (MHz) Figure 32-72. Reset Pulse Width vs. VCC MINIMUM RESET PULSE WIDTH vs.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... 33. Typical Characteristics – TA = -40°C to 105°C The following charts show typical behavior. These figures are not tested during manufacturing. All current consumption measurements are performed with all I/O pins configured as inputs and with internal pullups enabled. A sine wave generator with rail-to-rail output is used as clock source.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Figure 33-2. Active Supply Current vs. VCC (Internal RC Oscillator, 4 MHz) ACTIVE SUPPLY CURRENT vs. VCC INTERNAL RC OSCILLATOR, 4 MHz 5.5 -40 °C 25 °C 85 °C 105 °C 5 4.5 ICC (mA) 4 3.5 3 2.5 2 1.5 2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5 VCC (V) Figure 33-3. Active Supply Current vs. VCC (Internal RC Oscillator, 2 MHz) ACTIVE SUPPLY CURRENT vs. VCC INTERNAL RC OSCILLATOR, 2 MHz 3.5 -40 °C 3.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Figure 33-4. Active Supply Current vs. VCC (Internal RC Oscillator, 1 MHz) ACTIVE SUPPLY CURRENT vs. VCC INTERNAL RC OSCILLATOR, 1 MHz 25 °C -40 °C 85 °C 105 °C 1.8 1.7 1.6 ICC (mA) 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5 VCC (V) Figure 33-5. Active Supply Current vs. VCC (32 kHz External Oscillator) ICC ACTIVE SUPPLY CURRENT vs.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Idle Supply Current Figure 33-6. Idle Supply Current vs. VCC (Internal RC Oscillator, 8MHz) IDLE SUPPLY CURRENT vs. VCC INTERNAL RC OSCILLATOR, 8 MHz 4.2 -40 °C 25 °C 85 °C 105 °C 3.9 3.6 ICC (mA) 3.3 3 2.7 2.4 2.1 1.8 1.5 1.2 2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5 VCC (V) Figure 33-7. Idle Supply Current vs. VCC (Internal RC Oscillator, 4MHz) IDLE SUPPLY CURRENT vs. VCC INTERNAL RC OSCILLATOR, 4 MHz 2.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Figure 33-8. Idle Supply Current vs. VCC (Internal RC Oscillator, 2MHz) IDLE SUPPLY CURRENT vs. VCC INTERNAL RC OSCILLATOR, 2 MHz 105 °C 85 °C 25 °C -40 °C 0.9 0.8 ICC (mA) 0.7 0.6 0.5 0.4 0.3 0.2 2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5 VCC (V) Figure 33-9. Idle Supply Current vs. VCC (Internal RC Oscillator, 1MHz) IDLE SUPPLY CURRENT vs. VCC INTERNAL RC OSCILLATOR, 1 MHz 0.5 105 °C 85 °C 25 °C -40 °C 0.45 0.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Figure 33-10. Idle Supply Current vs. VCC (32kHz External RC Oscillator) POWER-SAVE SUPPLY CURRENT vs. VCC WATCHDOG TIMER DISABLED 24.5 105 °C 22.5 85 °C 20.5 25 °C -40 °C ICC (uA) 18.5 16.5 14.5 12.5 10.5 8.5 6.5 2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5 VCC (V) Power-down Supply Current Figure 33-11. Power-down Supply Current vs. VCC (Watchdog Timer Disabled) POWER-DOWN SUPPLY CURRENT vs.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Power-down Supply Current vs. VCC (Watchdog Timer Enabled) POWER-DOWN SUPPLY CURRENT vs. VCC WATCHDOG TIMER ENABLED 24 105 °C 85 °C 25 °C -40 °C 21 ICC (uA) 18 15 12 9 6 3 2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5 VCC (V) Power-save Supply Current Figure 33-12. Power-save Supply Current vs. VCC (Watchdog Timer Disabled) POWER-SAVE SUPPLY CURRENT vs.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... 33.1.5 Standby Supply Current Figure 33-13. Standby Supply Current vs. VCC (32kHz External RC Oscillator) STANDBY CURRENT vs. VCC 32 kHz Crystal Oscillator WDT DISABLED 25 105 °C 23 85 °C 21 25 °C -40 °C ICC (uA) 19 17 15 13 11 9 7 2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5 VCC (V) Pin Pull-up Figure 33-14. I/O Pin Pull-up Resistor Current vs. Input Voltage (VCC = 5V) I/O PIN PULL-UP RESISTOR CURRENT vs.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Figure 33-15. I/O Pin Pull-up Resistor Current vs. Input Voltage (VCC = 2.7V) I/O PIN PULL-UP RESISTOR CURRENT vs. INPUT VOLTAGE 80 70 60 IOP (uA) 50 40 30 20 85 °C 25 °C -40 °C 105 °C 10 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 VOP (V) Figure 33-16. Reset Pull-up Resistor Current vs. Reset Pin Voltage (VCC = 5V) RESET PULL-UP RESISTOR CURRENT vs.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Figure 33-17. Reset Pull-up Resistor Current vs. Reset Pin Voltage (VCC = 2.7V) RESET PULL-UP RESISTOR CURRENT vs. RESET PIN VOLTAGE 60 50 IRESET (uA) 40 30 20 25 °C -40 °C 85 °C 105 °C 10 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 VRESET (V) Pin Driver Strength Figure 33-18. I/O Pin Output Voltage vs. Source Current (VCC = 5V) I/O PIN OUTPUT VOLTAGE vs. SOURCE CURRENT NORMAL POWER PINS 5.1 5 4.9 4.8 VOH (V) 33.1.7 4.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Figure 33-19. I/O Pin Output Voltage vs. Source Current (VCC = 3V) I/O PIN OUTPUT VOLTAGE vs. SOURCE CURRENT NORMAL POWER PINS 3.1 2.9 VOH (V) 2.7 2.5 -40 °C 2.3 25 °C 2.1 85 °C 105 °C 1.9 1.7 0 2 4 6 8 10 12 14 16 18 20 IOH (mA) Figure 33-20. I/O Pin Output Voltage vs. Sink Current (VCC = 5V) I/O PIN OUTPUT VOLTAGE vs. SINK CURRENT NORMAL POWER PINS 105 °C 85 °C 0.6 0.5 25 °C VOL (V) 0.4 -40 °C 0.3 0.2 0.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Figure 33-21. I/O Pin Output Voltage vs. Sink Current (VCC = 3V) I/O PIN OUTPUT VOLTAGE vs. SINK CURRENT NORMAL POWER PINS 1 105 °C 85 °C 0.9 0.8 VOL (V) 0.7 25 °C 0.6 -40 °C 0.5 0.4 0.3 0.2 0.1 0 0 2 4 6 8 10 12 14 16 18 20 IOL(mA) Pin Threshold and Hysteresis Figure 33-22. I/O Pin Input Threshold vs. VCC (VIH , I/O Pin Read as ‘1’) I/O PIN INPUT THRESHOLD VOLTAGE vs.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Figure 33-23. I/O Pin Input Threshold vs. VCC (VIL, I/O Pin Read as ‘0’) I/O PIN INPUT THRESHOLD VOLTAGE vs. VCC VIL, IO PIN READ AS '0' 2.5 105 °C 85 °C 25 °C -40 °C Threshold (V) 2.2 1.9 1.6 1.3 1 2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5 VCC (V) Figure 33-24. I/O Pin Input Hysteresis vs. VCC I/O PIN INPUT HYSTERESIS vs. VCC 0.5 85 °C 105 °C Input Hysteresis (mV) 0.45 0.4 0.35 -40 °C 25 °C 0.3 0.25 2.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Figure 33-25. Reset Pin as I/O - Input Threshold vs. VCC (VIH , I/O Pin Read as ‘1’) I/O PIN INPUT THRESHOLD VOLTAGE vs. VCC VIH, IO PIN READ AS '1' 3.1 -40 °C 25 °C 85 °C 105 °C Threshold (V) 2.8 2.5 2.2 1.9 1.6 1.3 2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5 VCC (V) Figure 33-26. Reset Pin as I/O - Input Threshold vs. VCC (VIL, I/O Pin Read as ‘0’) I/O PIN INPUT THRESHOLD VOLTAGE vs.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Figure 33-27. Reset Pin as I/O - Pin Hysteresis vs. VCC RESET PIN AS IO, INPUT HYSTERESIS vs. VCC VIL, IO PIN READ AS "0" -40 °C 25 °C 85 °C 105 °C 0.7 Input Hysteresis (mV) 0.65 0.6 0.55 0.5 0.45 0.4 2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5 VCC (V) Figure 33-28. Reset Input Threshold vs. VCC (VIH , Reset Pin Read as ‘1’) RESET INPUT THRESHOLD VOLTAGE vs. VCC VIH, IO PIN READ AS '1' -40 °C 25 °C 85 °C 105 °C 2.5 2.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Figure 33-29. Reset Input Threshold vs. VCC (VIL, Reset Pin Read as ‘0’) RESET INPUT THRESHOLD VOLTAGE vs. VCC VIL, IO PIN READ AS '0' 2.4 105 °C 85 °C 25 °C -40 °C 2.2 Threshold (V) 2 1.8 1.6 1.4 1.2 1 2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5 VCC (V) Figure 33-30. Reset Pin Input Hysteresis vs. VCC RESET PIN INPUT HYSTERESIS vs. VCC 0.5 0.45 Input Hysteresis (mV) 0.4 0.35 0.3 -40 °C 0.25 25 °C 0.2 0.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... BOD Threshold Figure 33-31. BOD Threshold vs. Temperature (VCC = 4.3V) BOD THRESHOLDS vs. TEMPERATURE 4 Rising Vcc 3.98 3.96 Threshold (V) 3.94 3.92 3.9 3.88 Falling Vcc 3.86 3.84 3.82 3.8 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 Temperature (°C) Figure 33-32. BOD Threshold vs. Temperature (VCC = 2.7V) BOD THRESHOLDS vs. TEMPERATURE 2.63 Rising Vcc 2.61 2.59 Threshold (V) 33.1.9 2.57 2.55 2.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Figure 33-33. Bandgap Voltage vs. Temperature BANDGAP VOLTAGE vs. TEMPERATURE 1.215 1.21 5.5V Bandgap Voltage (V) 1.205 5.0V 1.2 4.0V 3.3V 2.7V 1.195 1.19 1.185 1.8V 1.18 1.175 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 Temperature (°C) Figure 33-34. Bandgap Voltage vs. VCC CALIB BANDGAP VOLTAGE vs. VCC 1.215 25 °C 85 °C 105 °C -40 °C 1.21 Bandgap Voltage (V) 1.205 1.2 1.195 1.19 1.185 1.18 1.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... 33.1.10 Internal Oscillator Speed Figure 33-35. Watchdog Oscillator Frequency vs. VCC WATCHDOG OSCILLATOR FREQUENCY vs. OPERATING VOLTAGE 25 °C -40 °C 85 °C 105 °C 1120 1100 FRC (kHz) 1080 1060 1040 1020 1000 980 2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5 VCC (V) Figure 33-36. Watchdog Oscillator Frequency vs. Temperature WATCHDOG OSCILLATOR FREQUENCY vs. TEMPERATURE 1130 1110 5.5 V 1090 FRC (kHz) 1070 5.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Figure 33-37. Calibrated 8MHz RC Oscillator vs. Temperature CALIBRATED 8MHz RC OSCILLATOR FREQUENCY vs. TEMPERATURE 8.4 8.2 8 FRC (MHz) 7.8 5.5 V 5.0 V 4.5 V 4.0 V 3.6 V 7.6 7.4 7.2 7 3.0 V 6.8 2.7 V 6.6 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 Temperature (°C) Figure 33-38. Calibrated 8MHz RC Oscillator vs. VCC CALIBRATED 8MHz RC OSCILLATOR FREQUENCY vs. OPERATING VOLTAGE 8.4 -40 °C 8.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Figure 33-39. Calibrated 8MHz RC Oscillator vs. OSCCAL Value CALIBRATED 8MHz RC OSCILLATOR FREQUENCY vs. OSCCAL VALUE 14 -40 °C 25 °C 85 °C 105 °C 12 FRC (MHz) 10 8 6 4 2 0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 256 OSCCAL (X1) Figure 33-40. Calibrated 4MHz RC Oscillator vs. Temperature CALIBRATED 4MHz RC OSCILLATOR FREQUENCY vs. TEMPERATURE 4.15 4.05 FRC (MHz) 3.95 5.5 V 5.0 V 4.5 V 4.0 V 3.6 V 3.85 3.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Figure 33-41. Calibrated 4MHz RC Oscillator vs. VCC CALIBRATED 4MHz RC OSCILLATOR FREQUENCY vs. OPERATING VOLTAGE 4.1 -40 °C 4.05 25 °C 4 85 °C 105 °C FRC (MHz) 3.95 3.9 3.85 3.8 3.75 3.7 3.65 3.6 2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5 VCC (V) Figure 33-42. Calibrated 4MHz RC Oscillator vs. OSCCAL Value CALIBRATED 4MHz RC OSCILLATOR FREQUENCY vs.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Figure 33-43. Calibrated 2MHz RC Oscillator vs. Temperature CALIBRATED 2MHz RC OSCILLATOR FREQUENCY vs. TEMPERATURE 2.05 2.02 1.99 5.5 V FRC (MHz) 1.96 5.0 V 4.5 V 4.0 V 3.6 V 1.93 1.9 1.87 1.84 3.0 V 2.7 V 1.81 1.78 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 Temperature (°C) Figure 33-44. Calibrated 2MHz RC Oscillator vs. VCC CALIBRATED 2MHz RC OSCILLATOR FREQUENCY vs. OPERATING VOLTAGE 2.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Figure 33-45. Calibrated 2MHz RC Oscillator vs. OSCCAL Value CALIBRATED 2MHz RC OSCILLATOR FREQUENCY vs. OSCCAL VALUE 3.5 -40 °C 25 °C 85 °C 105 °C 3.2 2.9 FRC (MHz) 2.6 2.3 2 1.7 1.4 1.1 0.8 0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 256 OSCCAL (X1) Figure 33-46. Calibrated 1MHz RC Oscillator vs. Temperature CALIBRATED 1MHz RC OSCILLATOR FREQUENCY vs. TEMPERATURE 1.03 1.01 5.5 V FRC (MHz) 0.99 5.0 V 4.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Figure 33-47. Calibrated 1MHz RC Oscillator vs. VCC CALIBRATED 1 MHz RC OSCILLATOR FREQUENCY vs. OPERATING VOLTAGE FRC (MHz) 1.04 1.02 -40 °C 25 °C 1 85 °C 105 °C 0.98 0.96 0.94 0.92 0.9 2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5 VCC (V) Figure 33-48. Calibrated 1MHz RC Oscillator vs. OSCCAL Value CALIBRATED 1MHz RC OSCILLATOR FREQUENCY vs. OSCCAL VALUE 1.8 -40 °C 25 °C 85 °C 105 °C 1.6 FRC (MHz) 1.4 1.2 1 0.8 0.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... 33.1.11 Current Consumption of Peripheral Units Figure 33-49. Brown-out Detector Current vs. VCC BROWNOUT DETECTOR CURRENT vs. VCC 18 -40 °C 17 25 °C 16 ICC (uA) 15 85 °C 105 °C 14 13 12 11 10 9 8 2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5 VCC (V) Figure 33-50. ADC Current vs. VCC (AREF = AVCC) ACTIVE SUPPLY CURRENT WITH ADC AT 50KHz vs.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Figure 33-51. Watchdog Timer Current vs. VCC WATCHDOG TIMER CURRENT vs. VCC 20 85 °C 105 °C 25 °C -40 °C 18 16 ICC (uA) 14 12 10 8 6 4 2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5 VCC (V) Figure 33-52. Analog Comparator Current vs. VCC ANALOG COMPARATOR CURRENT vs. VCC 72 105 °C 68 85 °C 64 ICC (mA) 60 25 °C 56 52 48 -40 °C 44 40 36 32 2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Figure 33-53. Programming Current vs. VCC EEPROM WRITE CURRENT vs. Vcc Ext Clk 6 -40 °C 5 25 °C ICC (mA) 4 85 °C 105 °C 3 2 1 0 2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5 VCC (V) 33.1.12 Current Consumption in Reset and Reset Pulsewidth Figure 33-54. Reset Supply Current vs. VCC (0.1 - 1.0MHz, Excluding Current Through the Reset Pull-up) RESET SUPPLY CURRENT vs.
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AVR 8-Bit Microcontroller Typical Characteristics – TA = -40°C to 105°... Figure 33-55. Reset Supply Current vs. VCC (1 - 16MHz, Excluding Current Through the Reset Pullup) RESET SUPPLY CURRENT vs. VCC EXCLUDING CURRENT THROUGH THE RESET PULLUP 12 5.5 V 10 5.0 V 4.5 V ICC (mA) 8 4.0 V 6 3.6 V 4 2.7 V 2 0 0 2 4 6 8 10 12 14 16 Frequency (MHz) Figure 33-56. Minimum Reset Pulsewidth vs. VCC MINIMUM RESET PULSE WIDTH vs.
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AVR 8-Bit Microcontroller Register Summary 34.
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AVR 8-Bit Microcontroller Register Summary Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0x15 (0x35) PORTC – PORTC6 PORTC5 PORTC4 PORTC3 PORTC2 PORTC1 PORTC0 0x14 (0x34) DDRC – DDC6 DDC5 DDC4 DDC3 DDC2 DDC1 DDC0 0x13 (0x33) PINC – PINC6 PINC5 PINC4 PINC3 PINC2 PINC1 PINC0 0x12 (0x32) PORTD PORTD7 PORTD6 PORTD5 PORTD4 PORTD3 PORTD2 PORTD1 PORTD0 0x11 (0x31) DDRD DDD7 DDD6 DDD5 DDD4 DDD3 DDD2 DDD1 DDD0 PIND7 PIND6 PIND5 PIND4 PIND3
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AVR 8-Bit Microcontroller Instruction Set Summary 35. Instruction Set Summary Table 35-1.
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AVR 8-Bit Microcontroller Instruction Set Summary Mnemonic Operands Description Op Flags SBRC Rr, b Skip if Bit in Register Cleared if (Rr(b) = 0) PC ← PC + 2 or 3 None SBRS Rr, b Skip if Bit in Register Set if (Rr(b) = 1) PC ← PC + 2 or 3 None SBIC A, b Skip if Bit in I/O Register Cleared if (I/O(A,b) = 0) PC ← PC + 2 or 3 None SBIS A, b Skip if Bit in I/O Register Set If (I/O(A,b) =1) PC ← PC + 2 or 3 None BRBS s, k Branch if Status Flag Set if (SREG(s) = 1) then PC ←
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AVR 8-Bit Microcontroller Instruction Set Summary Mnemonic Operands Description LD Rd, Z Load Indirect Rd ← (Z) None LD Rd, Z+ Load Indirect and Post-Increment Rd ← (Z) None Z ← Z+1 Z ← Z-1 Rd ← (Z) LD Rd, -Z Op Load Indirect and Pre-Decrement Flags None LDD Rd, Z+q Load Indirect with Displacement Rd ← (Z + q) None STS k, Rr Store Direct to Data Space (k) ← Rd None ST X, Rr Store Indirect (X) ← Rr None ST X+, Rr Store Indirect and Post-Increment (X) ←
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AVR 8-Bit Microcontroller Instruction Set Summary Mnemonic Operands Description Op Flags C ← Rd(0) Rd(n) ← Rd(n+1), n=0..6 Z,C,N,V ASR Rd Arithmetic Shift Right SWAP Rd Swap Nibbles Rd(3..0) ↔ Rd(7..
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AVR 8-Bit Microcontroller Packaging Information 36. Packaging Information 36.1 32-pin 32A PIN 1 IDENTIFIER PIN 1 e B E1 E D1 D C 0°~7° L A1 A2 A COMMON DIMENSIONS (Unit of measure = mm) Notes: 1. This package conforms to JEDEC reference MS-026, Variation ABA. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25mm per side. Dimensions D1 and E1 are maximum plastic body size dimensions including mold mismatch. 3. Lead coplanarity is 0.10mm maximum.
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AVR 8-Bit Microcontroller Packaging Information 36.2 28-pin 28P3 D PIN 1 E1 A SEATING PLANE L B2 B1 A1 B (4 PLACES) 0º ~ 15º REF e E C COMMON DIMENSIONS (Unit of Measure = mm) eB Note: 1. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25mm (0.010"). MIN NOM MAX A – – 4.5724 A1 0.508 – – D 34.544 – 34.798 E 7.620 – 8.255 E1 7.112 – 7.493 B 0.381 – 0.533 B1 1.143 – 1.397 B2 0.762 – 1.143 L 3.
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AVR 8-Bit Microcontroller Packaging Information 36.3 32-pin 32M1-A D D1 1 2 3 0 Pin 1 ID E1 SIDE VIEW E TOP VIEW A2 A3 A1 A K 0.08 C P D2 SYMBOL MIN NOM MAX A 0.80 0.90 1.00 A1 – 0.02 0.05 A2 – 0.65 1.00 1 2 3 P Pin #1 Notch (0.20 R) A3 E2 K e b COMMON DIMENSIONS (Unit of Measure = mm) L BOTTOM VIEW 0.20 REF b 0.18 0.23 0.30 D 4.90 5.00 5.10 D1 4.70 4.75 4.80 D2 2.95 3.10 3.25 E 4.90 5.00 5.10 E1 4.70 4.75 4.80 E2 2.95 3.10 3.
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AVR 8-Bit Microcontroller Errata 37. Errata The revision letter in this section refers to the revision of the ATmega8A device. 37.1 ATmega8A, rev.
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AVR 8-Bit Microcontroller Errata 5. compatibility between Rev. G and older revisions, must ensure that CKOPT is unprogrammed (CKOPT = 1). Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interrupt request. Reading EEPROM by using the ST or STS command to set the EERE bit in the EECR register triggers an unexpected EEPROM interrupt request. Problem Fix / Workaround: Always use OUT or SBI to set EERE in EECR. © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller Appendix A: Revision History 38. Appendix A: Revision History Revision A (December 2017) • • • • • • • Original data sheet for PIC18F66K80 family devices. Atmel document number 8159 is now Microchip DS40001974A.
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AVR 8-Bit Microcontroller Appendix A: Revision History – – – Register descriptions are moved to sub section at the end of each chapter. New graphics in Typical Characteristics – TA = -40°C to 85°C. New Ordering Information © 2017 Microchip Technology Inc.
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AVR 8-Bit Microcontroller The Microchip Web Site Microchip provides online support via our web site at http://www.microchip.com/. This web site is used as a means to make files and information easily available to customers.
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AVR 8-Bit Microcontroller • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act.
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AVR 8-Bit Microcontroller © 2017, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. ISBN: 978-1-5224-2479-6 Quality Management System Certified by DNV ISO/TS 16949 Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California ® ® and India.
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Worldwide Sales and Service AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://www.microchip.com/ support Web Address: www.microchip.