Datasheet

Figure 12-3. On-chip Data SRAM Access Cycles

clk

Data

Address

Address Valid

T1 T2 T3

Compute Address

Read

Write

CPU

Memory Vccess Instruction

Next Instruction

12.4 EEPROM Data Memory

The Atmel AVR ATmega8A contains 512 bytes of data EEPROM memory. It is organized as a separate

data space, in which single bytes can be read and written. The EEPROM has an endurance of at least

100,000 write/erase cycles. The access between the EEPROM and the CPU is described bellow,

specifying the EEPROM Address Registers, the EEPROM Data Register, and the EEPROM Control

Memory Programming contains a detailed description on EEPROM Programming in SPI- or Parallel

Programming mode.

Related Links

MEMPROG- Memory Programming

12.4.1 EEPROM Read/Write Access

The EEPROM Access Registers are accessible in the I/O space.

The write access time for the EEPROM is given in the table "EEPROM Programming Time". A self-timing

function, however, lets the user software detect when the next byte can be written. If the user code

contains instructions that write the EEPROM, some precautions must be taken. In heavily filtered power

supplies, V

is likely to rise or fall slowly on Power-up/down. This causes the device for some period of

time to run at a voltage lower than specified as minimum for the clock frequency used. See Preventing

EEPROM Corruption for details on how to avoid problems in these situations.

In order to prevent unintentional EEPROM writes, a specific write procedure must be followed. Refer to

the description of the EEPROM Control Register for details on this.

When the EEPROM is read, the CPU is halted for four clock cycles before the next instruction is

executed. When the EEPROM is written, the CPU is halted for two clock cycles before the next instruction

is executed.

12.4.2 EEPROM Write during Power-down Sleep Mode

When entering Power-down sleep mode while an EEPROM write operation is active, the EEPROM write

operation will continue, and will complete before the Write Access time has passed. However, when the

write operation is completed, the Oscillator continues running, and as a consequence, the device does

AVR 8-Bit Microcontroller

AVR Memories

Datasheet Complete

40001974A-page 38