Datasheet

• In Single Conversion mode, always select the channel before starting the conversion. The channel
selection may be changed one ADC clock cycle after writing one to ADSC. However, the simplest
method is to wait for the conversion to complete before changing the channel selection.
• In Free Running mode, always select the channel before starting the first conversion. The channel
selection may be changed one ADC clock cycle after writing one to ADSC. However, the simplest
method is to wait for the first conversion to complete, and then change the channel selection. Since
the next conversion has already started automatically, the next result will reflect the previous
channel selection. Subsequent conversions will reflect the new channel selection.
The user is advised not to write new channel or reference selection values during Free Running mode.
27.5.2 ADC Voltage Reference
The reference voltage for the ADC (V
REF
) indicates the conversion range for the ADC. Single ended
channels that exceed V
REF
will result in codes close to 0x3FF. V
REF
can be selected as either AV
CC
,
internal 2.56V reference, or external AREF pin.
AV
CC
is connected to the ADC through a passive switch. The internal 2.56V reference is generated from
the internal bandgap reference (V
BG
) through an internal amplifier. In either case, the external AREF pin
is directly connected to the ADC, and the reference voltage can be made more immune to noise by
connecting a capacitor between the AREF pin and ground. V
REF
can also be measured at the AREF pin
with a high impedance voltmeter. Note that V
REF
is a high impedance source, and only a capacitive load
should be connected in a system.
If the user has a fixed voltage source connected to the AREF pin, the user may not use the other
reference voltage options in the application, as they will be shorted to the external voltage. If no external
voltage is applied to the AREF pin, the user may switch between AV
CC
and 2.56V as reference selection.
The first ADC conversion result after switching reference voltage source may be inaccurate, and the user
is advised to discard this result.
27.6 ADC Noise Canceler
The ADC features a noise canceler that enables conversion during sleep mode to reduce noise induced
from the CPU core and other I/O peripherals. The noise canceler can be used with ADC Noise Reduction
and Idle mode. To make use of this feature, the following procedure should be used:
1. Make sure that the ADC is enabled and is not busy converting. Single Conversion mode must be
selected and the ADC conversion complete interrupt must be enabled.
2. Enter ADC Noise Reduction mode (or Idle mode). The ADC will start a conversion once the CPU
has been halted.
3. If no other interrupts occur before the ADC conversion completes, the ADC interrupt will wake up
the CPU and execute the ADC Conversion Complete interrupt routine. If another interrupt wakes up
the CPU before the ADC conversion is complete, that interrupt will be executed, and an ADC
Conversion Complete interrupt request will be generated when the ADC conversion completes. The
CPU will remain in active mode until a new sleep command is executed.
Note: The ADC will not be automatically turned off when entering other sleep modes than Idle mode and
ADC Noise Reduction mode. The user is advised to write zero to ADCRSA.ADEN before entering such
sleep modes to avoid excessive power consumption.
27.6.1 Analog Input Circuitry
The analog input circuitry for single ended channels is illustrated below. An analog source applied to
ADCn is subjected to the pin capacitance and input leakage of that pin, regardless of whether that
AVR 8-Bit Microcontroller
ADC - Analog to Digital Converter
© 2017 Microchip Technology Inc.
Datasheet Complete
40001974A-page 258