Datasheet

25.8.3 TWSR – TWI Status Register

Name: TWSR

Offset: 0x01

Reset: 0xF8

Property: When addressing I/O Registers as data space the offset address is 0x21

When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When

addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset

addresses.

Bit 7 6 5 4 3 2 1 0

TWSn[4:0] TWPSn[1:0]

Access

R R R R R R/W R/W

Reset 0 0 0 0 1 0 0

Bits 7:3 – TWSn[4:0] TWI Status Bit 7 [n = 7:3]

The TWS[7:3] reflect the status of the TWI logic and the 2-wire Serial Bus. The different status codes are

described later in this section. Note that the value read from TWSR contains both the 5-bit status value

and the 2-bit prescaler value. The application designer should mask the prescaler bits to zero when

checking the Status bits. This makes status checking independent of prescaler setting. This approach is

used in this datasheet, unless otherwise noted.

Bits 1:0 – TWPSn[1:0] TWI Prescaler [n = 1:0]

These bits can be read and written, and control the bit rate prescaler.

Table 25-8. TWI Bit Rate Prescaler

TWPS1 TWPS0 Prescaler Value

0 0 1

0 1 4

1 0 16

1 1 64

To calculate bit rates, refer to Bit Rate Generator Unit. The value of TWPS1:0 is used in the equation.

AVR 8-Bit Microcontroller

TWI - Two-wire Serial Interface

Datasheet Complete

40001974A-page 245