Datasheet
Bit 3 – USBS Stop Bit Select
This bit selects the number of stop bits to be inserted by the Transmitter. The Receiver ignores this
setting.
Table 24-6. USBS Bit Settings
USBS Stop Bit(s)
0 1-bit
1 2-bit
Bits 2:1 – UCSZn[1:0] Character Size [n = 1:0]
The UCSZ1:0 bits combined with the UCSZ2 bit in UCSRB sets the number of data bits (Character Size)
in a frame the Receiver and Transmitter use.
Table 24-7. UCSZ Bits Settings
UCSZ2 UCSZ1 UCSZ0 Character Size
0 0 0 5-bit
0 0 1 6-bit
0 1 0 7-bit
0 1 1 8-bit
1 0 0 Reserved
1 0 1 Reserved
1 1 0 Reserved
1 1 1 9-bit
Bit 0 – UCPOL Clock Polarity
This bit is used for Synchronous mode only. Write this bit to zero when Asynchronous mode is used. The
UCPOL bit sets the relationship between data output change and data input sample, and the
synchronous clock (XCK).
Table 24-8. UCPOL Bit Settings
UCPOL Transmitted Data Changed (Output of TxD
Pin)
Received Data Sampled (Input on RxD
Pin)
0 Rising XCK Edge Falling XCK Edge
1 Falling XCK Edge Rising XCK Edge
AVR 8-Bit Microcontroller
USART - Universal Synchronous and Asynchrono...
© 2017 Microchip Technology Inc.
Datasheet Complete
40001974A-page 208