Datasheet

4. Block Diagram
Figure 4-1. Block Diagram
CPU
USART
ADC
ADC[7:0]
AREF
RxD
TxD
XCK
I/O
PORTS
SRAM
EXTINT
FLASH
NVM
programming
TC 0
(8-bit)
SPI
AC
AIN0
AIN1
ADCMUX
EEPROM
EEPROMIF
TC 1
(16-bit)
OC1A/B
T1
ICP1
TC 2
(8-bit async)
TWI
SDA
SCL
Internal
Reference
Watchdog
Timer
Power
management
and clock
control
VCC
GND
Power
Supervision
POR/BOD &
RESET
XTAL2/
TOSC2
RESET
XTAL1/
TOSC1
INT[1:0]
T0
MISO
MOSI
SCK
SS
OC2
PB[7:0]
PC[6:0]
PD[7:0]
Clock generation
1/2/4/8MHz
Calib RC
1MHz int
osc
32.768kHz
XOSC
External
clock
8 MHz
Crystal Osc
D
A
T
A
B
U
S
12MHz
External
RC Osc
PARPROG
Serial
Programming
AVR 8-Bit Microcontroller
Block Diagram
© 2017 Microchip Technology Inc.
Datasheet Complete
40001974A-page 12